diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-10-02 11:56:39 +0200 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-10-04 19:15:55 +0200 |
commit | 7db506c3dd70f9ac0e8cdc481a47fa3835538be2 (patch) | |
tree | 954275c199955bdee8b7b0d08aaba698e230f34e /src/northbridge/amd/amdfam10 | |
parent | fb190ed764450208c393a43da4ab15b0f9ccbe58 (diff) |
src/northbridge: Remove unnecessary whitespace
Change-Id: Ib06ecd083f00c74f1d227368811729d2944dd1ef
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16851
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/amd/amdfam10')
-rw-r--r-- | src/northbridge/amd/amdfam10/early_ht.c | 2 | ||||
-rw-r--r-- | src/northbridge/amd/amdfam10/ht_config.c | 10 | ||||
-rw-r--r-- | src/northbridge/amd/amdfam10/northbridge.c | 4 | ||||
-rw-r--r-- | src/northbridge/amd/amdfam10/reset_test.c | 4 |
4 files changed, 10 insertions, 10 deletions
diff --git a/src/northbridge/amd/amdfam10/early_ht.c b/src/northbridge/amd/amdfam10/early_ht.c index 812935e108..36814638a9 100644 --- a/src/northbridge/amd/amdfam10/early_ht.c +++ b/src/northbridge/amd/amdfam10/early_ht.c @@ -106,7 +106,7 @@ static void enumerate_ht_chain(void) } real_last_unitid = next_unitid; real_last_pos = pos; - ht_dev_num++ ; + ht_dev_num++; #endif #if !CONFIG_HT_CHAIN_END_UNITID_BASE if (!next_unitid) diff --git a/src/northbridge/amd/amdfam10/ht_config.c b/src/northbridge/amd/amdfam10/ht_config.c index 226d9a8c0a..9259147625 100644 --- a/src/northbridge/amd/amdfam10/ht_config.c +++ b/src/northbridge/amd/amdfam10/ht_config.c @@ -129,7 +129,7 @@ u32 get_io_addr_index(u32 nodeid, u32 linkn) for (index = 0; index < 256; index++) { if (sysconf.conf_io_addrx[index+4] == 0) { - sysconf.conf_io_addr[index+4] = (nodeid & 0x3f) ; + sysconf.conf_io_addr[index+4] = (nodeid & 0x3f); sysconf.conf_io_addrx[index+4] = 1 | ((linkn & 0x7)<<4); return index; } @@ -144,7 +144,7 @@ u32 get_mmio_addr_index(u32 nodeid, u32 linkn) for (index = 0; index < 64; index++) { if (sysconf.conf_mmio_addrx[index+8] == 0) { - sysconf.conf_mmio_addr[index+8] = (nodeid & 0x3f) ; + sysconf.conf_mmio_addr[index+8] = (nodeid & 0x3f); sysconf.conf_mmio_addrx[index+8] = 1 | ((linkn & 0x7)<<4); return index; } @@ -164,7 +164,7 @@ void store_conf_io_addr(u32 nodeid, u32 linkn, u32 reg, u32 index, val = (nodeid & 0x3f); // 6 bits used sysconf.conf_io_addr[index] = val | ((io_max<<8) & 0xfffff000); //limit : with nodeid - val = 3 | ((linkn & 0x7)<<4) ; // 8 bits used + val = 3 | ((linkn & 0x7)<<4); // 8 bits used sysconf.conf_io_addrx[index] = val | ((io_min<<8) & 0xfffff000); // base : with enable bit if (sysconf.io_addr_num < (index+1)) @@ -180,9 +180,9 @@ void store_conf_mmio_addr(u32 nodeid, u32 linkn, u32 reg, u32 index, /* io range allocation */ index = (reg-0x80)>>3; - val = (nodeid & 0x3f) ; // 6 bits used + val = (nodeid & 0x3f); // 6 bits used sysconf.conf_mmio_addr[index] = val | (mmio_max & 0xffffff00); //limit : with nodeid and linkn - val = 3 | ((linkn & 0x7)<<4) ; // 8 bits used + val = 3 | ((linkn & 0x7)<<4); // 8 bits used sysconf.conf_mmio_addrx[index] = val | (mmio_min & 0xffffff00); // base : with enable bit if (sysconf.mmio_addr_num<(index+1)) diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index 354e70316f..40f57046e8 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -577,7 +577,7 @@ static void amdfam10_set_resource(device_t dev, struct resource *resource, set_io_addr_reg(dev, nodeid, link_num, reg, rbase>>8, rend>>8); store_conf_io_addr(nodeid, link_num, reg, (resource->index >> 24), rbase>>8, rend>>8); } else if (resource->flags & IORESOURCE_MEM) { - set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, sysconf.nodes) ;// [39:8] + set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, sysconf.nodes); // [39:8] store_conf_mmio_addr(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8); } resource->flags |= IORESOURCE_STORED; @@ -966,7 +966,7 @@ static void amdfam10_domain_set_resources(device_t dev) if (!(d.mask & 1)) continue; basek = ((resource_t)(d.base & 0x1fffff00)) << 9; // could overflow, we may lost 6 bit here - limitk = ((resource_t)((d.mask + 0x00000100) & 0x1fffff00)) << 9 ; + limitk = ((resource_t)((d.mask + 0x00000100) & 0x1fffff00)) << 9; sizek = limitk - basek; /* see if we need a hole from 0xa0000 to 0xbffff */ diff --git a/src/northbridge/amd/amdfam10/reset_test.c b/src/northbridge/amd/amdfam10/reset_test.c index 7ddf93f120..0e64397ff0 100644 --- a/src/northbridge/amd/amdfam10/reset_test.c +++ b/src/northbridge/amd/amdfam10/reset_test.c @@ -108,7 +108,7 @@ static u8 node_link_to_bus(u8 node, u8 link) // node are 6 bit, and link three b u32 val; // put node and link in correct bit - val = ((node & 0x0f)<<4) | ((node & 0x30)<< (12-4)) | ((link & 0x07)<<8) ; + val = ((node & 0x0f)<<4) | ((node & 0x30)<< (12-4)) | ((link & 0x07)<<8); for (reg = 0xE0; reg < 0xF0; reg += 0x04) { u32 config_map; @@ -131,7 +131,7 @@ u32 get_sblk(void) u32 reg; /* read PCI_DEV(CONFIG_CBB,CONFIG_CDB,0) 0x64 bit [8:9] to find out SbLink m */ reg = pci_io_read_config32(PCI_DEV(CONFIG_CBB, CONFIG_CDB, 0), 0x64); - return ((reg>>8) & 3) ; + return ((reg>>8) & 3); } |