diff options
author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-09-05 18:40:31 -0500 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2015-10-30 18:19:37 +0100 |
commit | 59d0e040c89b5eea5f2febfa73de57d45a9ae535 (patch) | |
tree | b5e51d168e40dcb8025a32ea0695f68ef66dd7ff /src/northbridge/amd/amdfam10 | |
parent | 4ea0cc087eb7adf5ce49f445bf590129b9ba97e0 (diff) |
northbridge/amd/amdmct/mct_ddr3: Add initial Suspend to RAM (S3) support
Change-Id: Ic97567851fa40295bc21cefd7537407b99d71709
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11952
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/northbridge/amd/amdfam10')
-rw-r--r-- | src/northbridge/amd/amdfam10/Makefile.inc | 2 | ||||
-rw-r--r-- | src/northbridge/amd/amdfam10/northbridge.c | 8 |
2 files changed, 10 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdfam10/Makefile.inc b/src/northbridge/amd/amdfam10/Makefile.inc index e4dd9e39f6..f083f31c87 100644 --- a/src/northbridge/amd/amdfam10/Makefile.inc +++ b/src/northbridge/amd/amdfam10/Makefile.inc @@ -28,4 +28,6 @@ s3nv-file := $(obj)/coreboot_s3nv.rom s3nv-align := $(CONFIG_S3_DATA_SIZE) s3nv-type := raw +ramstage-$(CONFIG_DIMM_DDR3) += ../amdmct/mct_ddr3/s3utils.c + endif diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index 74cecc894a..d4fe986298 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -54,6 +54,10 @@ #include <sb_cimx.h> #endif +#if IS_ENABLED(CONFIG_DIMM_DDR3) +#include "../amdmct/mct_ddr3/s3utils.h" +#endif + struct amdfam10_sysconf_t sysconf; #define FX_DEVS NODE_NUMS @@ -1413,6 +1417,10 @@ static void root_complex_enable_dev(struct device *dev) /* Do not delay UMA setup, as a device on the PCI bus may evaluate the global uma_memory variables already in its enable function. */ if (!done) { +#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) && IS_ENABLED(CONFIG_DIMM_DDR3) + save_mct_information_to_nvram(); +#endif + setup_bsp_ramtop(); setup_uma_memory(); done = 1; |