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authorElyes HAOUAS <ehaouas@noos.fr>2016-10-02 11:56:39 +0200
committerMartin Roth <martinroth@google.com>2016-10-04 19:15:55 +0200
commit7db506c3dd70f9ac0e8cdc481a47fa3835538be2 (patch)
tree954275c199955bdee8b7b0d08aaba698e230f34e /src/northbridge/amd/amdfam10/reset_test.c
parentfb190ed764450208c393a43da4ab15b0f9ccbe58 (diff)
src/northbridge: Remove unnecessary whitespace
Change-Id: Ib06ecd083f00c74f1d227368811729d2944dd1ef Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16851 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/amd/amdfam10/reset_test.c')
-rw-r--r--src/northbridge/amd/amdfam10/reset_test.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/amdfam10/reset_test.c b/src/northbridge/amd/amdfam10/reset_test.c
index 7ddf93f120..0e64397ff0 100644
--- a/src/northbridge/amd/amdfam10/reset_test.c
+++ b/src/northbridge/amd/amdfam10/reset_test.c
@@ -108,7 +108,7 @@ static u8 node_link_to_bus(u8 node, u8 link) // node are 6 bit, and link three b
u32 val;
// put node and link in correct bit
- val = ((node & 0x0f)<<4) | ((node & 0x30)<< (12-4)) | ((link & 0x07)<<8) ;
+ val = ((node & 0x0f)<<4) | ((node & 0x30)<< (12-4)) | ((link & 0x07)<<8);
for (reg = 0xE0; reg < 0xF0; reg += 0x04) {
u32 config_map;
@@ -131,7 +131,7 @@ u32 get_sblk(void)
u32 reg;
/* read PCI_DEV(CONFIG_CBB,CONFIG_CDB,0) 0x64 bit [8:9] to find out SbLink m */
reg = pci_io_read_config32(PCI_DEV(CONFIG_CBB, CONFIG_CDB, 0), 0x64);
- return ((reg>>8) & 3) ;
+ return ((reg>>8) & 3);
}