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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-02-21 12:42:51 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-03-09 19:33:08 +0100 |
| commit | bf62b2ddb074c22738b5c9e8dc6c1ecb5d2e5e97 (patch) | |
| tree | fd9de8c29a036c266ed085350359fdf573b999b5 /src/northbridge/amd/amdfam10/ht_config.c | |
| parent | 991a71d55c3099b01acb4b42e97d72aa64816898 (diff) | |
AMD fam10: Drop PCI_BUS_SEGN_BITS
All boards in tree use 0. Looks like this is all work that was
never completed and tested.
We also have static setting sysconf.segbit=0 which would conflict
with PCI_BUS_SEGN_BITS>0.
Having PCI_BUS_SEGN_BITS>0 would also require PCI MMCONF support
to cover over 255 buses.
Change-Id: I060efc44d1560541473b01690c2e8192863c1eb5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8554
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/northbridge/amd/amdfam10/ht_config.c')
| -rw-r--r-- | src/northbridge/amd/amdfam10/ht_config.c | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/src/northbridge/amd/amdfam10/ht_config.c b/src/northbridge/amd/amdfam10/ht_config.c index cfd8a24526..efb3148470 100644 --- a/src/northbridge/amd/amdfam10/ht_config.c +++ b/src/northbridge/amd/amdfam10/ht_config.c @@ -76,27 +76,6 @@ void clear_config_map_reg(u32 nodeid, u32 linkn, u32 ht_c_index, } } -#if CONFIG_PCI_BUS_SEGN_BITS -u32 check_segn(device_t dev, u32 segbusn, u32 nodes, - sys_info_conf_t *sysinfo) -{ - //check segbusn here, We need every node have the same segn - if ((segbusn & 0xff)>(0xe0-1)) {// use next segn - u32 segn = (segbusn >> 8) & 0x0f; - segn++; - segbusn = segn<<8; - } - if (segbusn>>8) { - u32 val; - val = pci_read_config32(dev, 0x160); - val &= ~(0xf<<25); - val |= (segbusn & 0xf00)<<(25-8); - pci_write_config32(dev, 0x160, val); - } - - return segbusn; -} -#endif u32 get_ht_c_index(u32 nodeid, u32 linkn, sys_info_conf_t *sysinfo) { |