diff options
| author | Martin Roth <martin@coreboot.org> | 2019-10-23 21:44:42 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-10-27 18:12:50 +0000 |
| commit | 468d02cc82151366a2781c9af29e6737105495cb (patch) | |
| tree | de8540c053517a4da8b00ea95f24579bd9223dcd /src/northbridge/amd/amdfam10/early_ht.c | |
| parent | 36fcc85be459ec175c7f4be08db7ae9708f01b5d (diff) | |
src/[northbridge,security]: change "unsigned" to "unsigned int"
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: If6b5930f78c3da6dcefaa7b6202cd0424a24525b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36331
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge/amd/amdfam10/early_ht.c')
| -rw-r--r-- | src/northbridge/amd/amdfam10/early_ht.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/northbridge/amd/amdfam10/early_ht.c b/src/northbridge/amd/amdfam10/early_ht.c index 3f2b138533..dc0f6840e2 100644 --- a/src/northbridge/amd/amdfam10/early_ht.c +++ b/src/northbridge/amd/amdfam10/early_ht.c @@ -50,11 +50,11 @@ void enumerate_ht_chain(void) * non Coherent links the appropriate bus registers for the * links needs to be programed to point at bus 0. */ - unsigned next_unitid, last_unitid = 0; + unsigned int next_unitid, last_unitid = 0; #if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20 // let't record the device of last ht device, So we can set the // Unitid to CONFIG_HT_CHAIN_END_UNITID_BASE - unsigned real_last_unitid = 0; + unsigned int real_last_unitid = 0; u8 real_last_pos = 0; int ht_dev_num = 0; // except host_bridge u8 end_used = 0; @@ -96,8 +96,8 @@ void enumerate_ht_chain(void) pci_io_write_config16(PCI_DEV(0,0,0), pos + PCI_CAP_FLAGS, flags); flags = pci_io_read_config16(PCI_DEV(0,0,0), pos + PCI_CAP_FLAGS); if ((flags >> 13) == 0) { - unsigned count; - unsigned ctrl, ctrl_off; + unsigned int count; + unsigned int ctrl, ctrl_off; pci_devfn_t devx; #if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20 |