aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge/amd/agesa
diff options
context:
space:
mode:
authorMartin Roth <martinroth@google.com>2017-06-24 14:45:48 -0600
committerMartin Roth <martinroth@google.com>2017-07-08 19:01:19 +0000
commit77a58b92e8d44d17b9aa06710ed728a697722b4a (patch)
treecd934fee0c39aa741bbad7112375877e3b05e9e8 /src/northbridge/amd/agesa
parent3c35ad90534d4aebd6d9723e4614efb6af01f45c (diff)
nb/amd: add IS_ENABLED() around Kconfig symbol references
Some of these can be changed from #if to if(), but that will happen in a follow-on commmit. Change-Id: I763cbbc31dcd4cdd128c04793a742ab6daaf5f0c Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20345 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/northbridge/amd/agesa')
-rw-r--r--src/northbridge/amd/agesa/family10/northbridge.c10
-rw-r--r--src/northbridge/amd/agesa/family12/northbridge.c6
-rw-r--r--src/northbridge/amd/agesa/family14/northbridge.c6
-rw-r--r--src/northbridge/amd/agesa/family15/northbridge.c6
-rw-r--r--src/northbridge/amd/agesa/family15rl/northbridge.c2
-rw-r--r--src/northbridge/amd/agesa/family15tn/northbridge.c2
-rw-r--r--src/northbridge/amd/agesa/family16kb/northbridge.c2
7 files changed, 17 insertions, 17 deletions
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c
index 15693b797c..d80fa55d8f 100644
--- a/src/northbridge/amd/agesa/family10/northbridge.c
+++ b/src/northbridge/amd/agesa/family10/northbridge.c
@@ -27,7 +27,7 @@
#include <cpu/x86/lapic.h>
#include <cbmem.h>
-#if CONFIG_LOGICAL_CPUS
+#if IS_ENABLED(CONFIG_LOGICAL_CPUS)
#include <pc80/mc146818rtc.h>
#endif
@@ -496,7 +496,7 @@ static void amdfam10_create_vga_resource(device_t dev, unsigned nodeid)
* we only deal with the 'first' vga card */
for (link = dev->link_list; link; link = link->next) {
if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
-#if CONFIG_MULTIPLE_VGA_ADAPTERS
+#if IS_ENABLED(CONFIG_MULTIPLE_VGA_ADAPTERS)
extern device_t vga_pri; // the primary vga device, defined in device.c
printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d bus range [%d,%d]\n", vga_pri->bus->secondary,
link->secondary,link->subordinate);
@@ -800,7 +800,7 @@ static void amdfam10_domain_set_resources(device_t dev)
ramtop = limitk * 1024;
}
-#if CONFIG_GFXUMA
+#if IS_ENABLED(CONFIG_GFXUMA)
set_top_of_ram(uma_memory_base);
uma_resource(dev, 7, uma_memory_base >> 10, uma_memory_size >> 10);
#else
@@ -942,7 +942,7 @@ static void cpu_bus_scan(device_t dev)
}
disable_siblings = !CONFIG_LOGICAL_CPUS;
-#if CONFIG_LOGICAL_CPUS
+#if IS_ENABLED(CONFIG_LOGICAL_CPUS)
get_option(&disable_siblings, "multi_core");
#endif
@@ -1117,7 +1117,7 @@ static void root_complex_enable_dev(struct device *dev)
the global uma_memory variables already in its enable function. */
if (!done) {
setup_bsp_ramtop();
-#if CONFIG_GFXUMA
+#if IS_ENABLED(CONFIG_GFXUMA)
#error Northbridge does not set uma_memory_base or uma_memory_size.
setup_uma_memory();
#endif
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index 206ae4795b..3bf46078dd 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -362,7 +362,7 @@ static void set_resource(device_t dev, struct resource *resource, u32 nodeid)
}
-#if CONFIG_CONSOLE_VGA_MULTI
+#if IS_ENABLED(CONFIG_CONSOLE_VGA_MULTI)
extern device_t vga_pri; // the primary vga device, defined in device.c
#endif
@@ -376,7 +376,7 @@ printk(BIOS_DEBUG, "\nFam12h - northbridge.c - %s - Start.\n",__func__);
* we only deal with the 'first' vga card */
for (link = dev->link_list; link; link = link->next) {
if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
-#if CONFIG_CONSOLE_VGA_MULTI
+#if IS_ENABLED(CONFIG_CONSOLE_VGA_MULTI)
printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d bus range [%d,%d]\n", vga_pri->bus->secondary,
link->secondary,link->subordinate);
/* We need to make sure the vga_pri is under the link */
@@ -600,7 +600,7 @@ static void domain_enable_resources(device_t dev)
printk(BIOS_DEBUG, "\nFam12h - northbridge.c - %s - Start.\n",__func__);
/* Must be called after PCI enumeration and resource allocation */
-#if CONFIG_AMD_SB_CIMX
+#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
sb_After_Pci_Init();
sb_Mid_Post_Init();
#endif
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index e5700963d8..d5bf73091d 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -353,7 +353,7 @@ static void set_resource(device_t dev, struct resource *resource, u32 nodeid)
report_resource_stored(dev, resource, buf);
}
-#if CONFIG_CONSOLE_VGA_MULTI
+#if IS_ENABLED(CONFIG_CONSOLE_VGA_MULTI)
extern device_t vga_pri; // the primary vga device, defined in device.c
#endif
@@ -367,7 +367,7 @@ static void create_vga_resource(device_t dev, unsigned nodeid)
* we only deal with the 'first' vga card */
for (link = dev->link_list; link; link = link->next) {
if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
-#if CONFIG_CONSOLE_VGA_MULTI
+#if IS_ENABLED(CONFIG_CONSOLE_VGA_MULTI)
printk(BIOS_DEBUG,
"VGA: vga_pri bus num = %d bus range [%d,%d]\n",
vga_pri->bus->secondary, link->secondary,
@@ -581,7 +581,7 @@ static void domain_set_resources(device_t dev)
static void domain_enable_resources(device_t dev)
{
-#if CONFIG_AMD_SB_CIMX
+#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
if (!acpi_is_wakeup_s3()) {
sb_After_Pci_Init();
sb_Mid_Post_Init();
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index 15af02401a..cef6674f5c 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -391,7 +391,7 @@ static void create_vga_resource(device_t dev, unsigned nodeid)
* we only deal with the 'first' vga card */
for (link = dev->link_list; link; link = link->next) {
if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
-#if CONFIG_MULTIPLE_VGA_ADAPTERS
+#if IS_ENABLED(CONFIG_MULTIPLE_VGA_ADAPTERS)
extern device_t vga_pri; // the primary vga device, defined in device.c
printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d bus range [%d,%d]\n", vga_pri->bus->secondary,
link->secondary,link->subordinate);
@@ -640,7 +640,7 @@ static void domain_enable_resources(device_t dev)
/* Must be called after PCI enumeration and resource allocation */
printk(BIOS_DEBUG, "\nFam15 - %s: AmdInitMid.\n", __func__);
-#if CONFIG_AMD_SB_CIMX
+#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
sb_After_Pci_Init();
#endif
/* Enable MMIO on AMD CPU Address Map Controller */
@@ -1021,7 +1021,7 @@ static void cpu_bus_scan(device_t dev)
lapicid_start = (lapicid_start + 1) * core_max;
printk(BIOS_SPEW, "lpaicid_start = 0x%x ", lapicid_start);
}
-#if CONFIG_CPU_AMD_SOCKET_G34
+#if IS_ENABLED(CONFIG_CPU_AMD_SOCKET_G34)
u32 apic_id = (i / 2 * core_max) + j + lapicid_start + (i % 2 ? siblings + 1 : 0);
#else
u32 apic_id = (i * core_max) + j + lapicid_start;
diff --git a/src/northbridge/amd/agesa/family15rl/northbridge.c b/src/northbridge/amd/agesa/family15rl/northbridge.c
index 8cb801b1f7..800d6b132b 100644
--- a/src/northbridge/amd/agesa/family15rl/northbridge.c
+++ b/src/northbridge/amd/agesa/family15rl/northbridge.c
@@ -390,7 +390,7 @@ static void create_vga_resource(struct device *dev, unsigned nodeid)
* we only deal with the 'first' vga card */
for (link = dev->link_list; link; link = link->next) {
if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
-#if CONFIG_MULTIPLE_VGA_ADAPTERS
+#if IS_ENABLED(CONFIG_MULTIPLE_VGA_ADAPTERS)
extern struct device *vga_pri; // the primary vga device, defined in device.c
printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d bus range [%d,%d]\n", vga_pri->bus->secondary,
link->secondary,link->subordinate);
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index 66da338b94..374c74ff69 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -389,7 +389,7 @@ static void create_vga_resource(device_t dev, unsigned nodeid)
* we only deal with the 'first' vga card */
for (link = dev->link_list; link; link = link->next) {
if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
-#if CONFIG_MULTIPLE_VGA_ADAPTERS
+#if IS_ENABLED(CONFIG_MULTIPLE_VGA_ADAPTERS)
extern device_t vga_pri; // the primary vga device, defined in device.c
printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d bus range [%d,%d]\n", vga_pri->bus->secondary,
link->secondary,link->subordinate);
diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c
index 4545601e42..d586e7a36a 100644
--- a/src/northbridge/amd/agesa/family16kb/northbridge.c
+++ b/src/northbridge/amd/agesa/family16kb/northbridge.c
@@ -389,7 +389,7 @@ static void create_vga_resource(device_t dev, unsigned nodeid)
* we only deal with the 'first' vga card */
for (link = dev->link_list; link; link = link->next) {
if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
-#if CONFIG_MULTIPLE_VGA_ADAPTERS
+#if IS_ENABLED(CONFIG_MULTIPLE_VGA_ADAPTERS)
extern device_t vga_pri; // the primary vga device, defined in device.c
printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d bus range [%d,%d]\n", vga_pri->bus->secondary,
link->secondary,link->subordinate);