diff options
author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-11-20 19:58:09 +1100 |
---|---|---|
committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-11-24 05:37:50 +0100 |
commit | ae5fd3453a61d95b9f786b4412cb1705563e81cb (patch) | |
tree | 17a8701b047d2576cbc2282cf0003cad71c856e8 /src/northbridge/amd/agesa/family15tn | |
parent | 9e999d6a14783ae15bf7f6d8843ea667fd8888e7 (diff) |
northbridge/amd/agesa/family1{4,5,5tn,6kb}: Reduce differences
Lets cut down on whitespace differences, fix some typos and indents.
Also make use of ARRAY_SIZE() macro instead of a local redefinition.
Fix NULL pointer checks ordering and not to use zero.
Change-Id: I93f344d300c04570d795659d848255cb1832e1d8
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7528
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/northbridge/amd/agesa/family15tn')
-rw-r--r-- | src/northbridge/amd/agesa/family15tn/Kconfig | 2 | ||||
-rw-r--r-- | src/northbridge/amd/agesa/family15tn/chip.h | 4 | ||||
-rw-r--r-- | src/northbridge/amd/agesa/family15tn/dimmSpd.c | 26 | ||||
-rw-r--r-- | src/northbridge/amd/agesa/family15tn/northbridge.c | 20 | ||||
-rw-r--r-- | src/northbridge/amd/agesa/family15tn/northbridge.h | 6 |
5 files changed, 32 insertions, 26 deletions
diff --git a/src/northbridge/amd/agesa/family15tn/Kconfig b/src/northbridge/amd/agesa/family15tn/Kconfig index 24fdb0ddd0..c94782cf7e 100644 --- a/src/northbridge/amd/agesa/family15tn/Kconfig +++ b/src/northbridge/amd/agesa/family15tn/Kconfig @@ -38,4 +38,4 @@ config MMCONF_BUS_NUMBER int default 64 -endif +endif # NORTHBRIDGE_AMD_AGESA_FAMILY15_TN diff --git a/src/northbridge/amd/agesa/family15tn/chip.h b/src/northbridge/amd/agesa/family15tn/chip.h index 41571db9be..dafbfae7f0 100644 --- a/src/northbridge/amd/agesa/family15tn/chip.h +++ b/src/northbridge/amd/agesa/family15tn/chip.h @@ -17,8 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef _AGESA_FAM15TN_CHIP_H_ -#define _AGESA_FAM15TN_CHIP_H_ +#ifndef _NB_AGESA_CHIP_H_ +#define _NB_AGESA_CHIP_H_ struct northbridge_amd_agesa_family15tn_config { diff --git a/src/northbridge/amd/agesa/family15tn/dimmSpd.c b/src/northbridge/amd/agesa/family15tn/dimmSpd.c index 4d5ab5f340..25f2a14caf 100644 --- a/src/northbridge/amd/agesa/family15tn/dimmSpd.c +++ b/src/northbridge/amd/agesa/family15tn/dimmSpd.c @@ -19,6 +19,7 @@ #include <device/pci_def.h> #include <device/device.h> +#include <stdlib.h> /* warning: Porting.h includes an open #pragma pack(1) */ #include "Porting.h" @@ -26,28 +27,33 @@ #include "amdlib.h" #include "chip.h" -#include "northbridge/amd/agesa/dimmSpd.h" - -#define DIMENSION(array)(sizeof (array)/ sizeof (array [0])) +#include <northbridge/amd/agesa/dimmSpd.h> +/** + * Gets the SMBus address for an SPD from the array in devicetree.cb + * then read the SPD into the supplied buffer. + */ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info) { - int spdAddress; + UINT8 spdAddress; + ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); - ROMSTAGE_CONST struct northbridge_amd_agesa_family15tn_config *config = dev->chip_info; + if (dev == NULL) + return AGESA_ERROR; - if ((dev == 0) || (config == 0)) + ROMSTAGE_CONST struct northbridge_amd_agesa_family15tn_config *config = dev->chip_info; + if (config == NULL) return AGESA_ERROR; - if (info->SocketId >= DIMENSION(config->spdAddrLookup )) + if (info->SocketId >= ARRAY_SIZE(config->spdAddrLookup)) return AGESA_ERROR; - if (info->MemChannelId >= DIMENSION(config->spdAddrLookup[0] )) + if (info->MemChannelId >= ARRAY_SIZE(config->spdAddrLookup[0])) return AGESA_ERROR; - if (info->DimmId >= DIMENSION(config->spdAddrLookup[0][0])) + if (info->DimmId >= ARRAY_SIZE(config->spdAddrLookup[0][0])) return AGESA_ERROR; spdAddress = config->spdAddrLookup - [info->SocketId] [info->MemChannelId] [info->DimmId]; + [info->SocketId][info->MemChannelId][info->DimmId]; if (spdAddress == 0) return AGESA_ERROR; diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index 474767e029..ce0826ac21 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -201,8 +201,8 @@ static void set_vga_enable_reg(u32 nodeid, u32 linkn) /** * @return - * @retval 2 resoure not exist, usable - * @retval 0 resource exist, not usable + * @retval 2 resoure does not exist, usable + * @retval 0 resource exists, not usable * @retval 1 resource exist, resource has been allocated before */ static int reg_useable(unsigned reg, device_t goal_dev, unsigned goal_nodeid, @@ -392,7 +392,7 @@ static void set_resource(device_t dev, struct resource *resource, u32 nodeid) set_io_addr_reg(dev, nodeid, link_num, reg, rbase>>8, rend>>8); } else if (resource->flags & IORESOURCE_MEM) { - set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, node_nums) ;// [39:8] + set_mmio_addr_reg(nodeid, link_num, reg, (resource->index >>24), rbase>>8, rend>>8, node_nums);// [39:8] } resource->flags |= IORESOURCE_STORED; snprintf(buf, sizeof (buf), " <node %x link %x>", @@ -749,7 +749,7 @@ static void domain_set_resources(device_t dev) if (!(d.mask & 1)) continue; basek = ((resource_t)(d.base & 0x1fffff00)) << 9; // could overflow, we may lost 6 bit here - limitk = ((resource_t)(((d.mask & ~1) + 0x000FF) & 0x1fffff00)) << 9 ; + limitk = ((resource_t)(((d.mask & ~1) + 0x000FF) & 0x1fffff00)) << 9; sizek = limitk - basek; @@ -1078,16 +1078,16 @@ static void root_complex_enable_dev(struct device *dev) } struct chip_operations northbridge_amd_agesa_family15tn_root_complex_ops = { - CHIP_NAME("AMD FAM15 Root Complex") + CHIP_NAME("AMD FAM15tn Root Complex") .enable_dev = root_complex_enable_dev, }; -/******************************************************************** -* Change the vendor / device IDs to match the generic VBIOS header. -********************************************************************/ +/********************************************************************* + * Change the vendor / device IDs to match the generic VBIOS header. * + *********************************************************************/ u32 map_oprom_vendev(u32 vendev) { - u32 new_vendev=vendev; + u32 new_vendev = vendev; switch(vendev) { case 0x10029900: /* AMD Radeon HD 7660G (Trinity) */ @@ -1124,7 +1124,7 @@ u32 map_oprom_vendev(u32 vendev) case 0x100299A0: /* AMD Radeon HD 7520G (Trinity) */ case 0x100299A2: /* AMD Radeon HD 7420G (Trinity) */ case 0x100299A4: /* AMD Radeon HD 7400G (Trinity) */ - new_vendev=0x10029901; + new_vendev = 0x10029901; break; } diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.h b/src/northbridge/amd/agesa/family15tn/northbridge.h index 0d91d5af90..9c655e6f9e 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.h +++ b/src/northbridge/amd/agesa/family15tn/northbridge.h @@ -17,10 +17,10 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef NORTHBRIDGE_AMD_AGESA_FAM15H_H -#define NORTHBRIDGE_AMD_AGESA_FAM15H_H +#ifndef NORTHBRIDGE_AMD_AGESA_FAM15_H +#define NORTHBRIDGE_AMD_AGESA_FAM15_H static struct device_operations pci_domain_ops; static struct device_operations cpu_bus_ops; -#endif /* NORTHBRIDGE_AMD_AGESA_FAM15H_H */ +#endif /* NORTHBRIDGE_AMD_AGESA_FAM15_H */ |