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authorKyösti Mälkki <kyosti.malkki@gmail.com>2012-08-05 12:11:40 +0300
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2012-08-09 19:15:32 +0200
commitdbc4739a0dcaffde1d0f2edbc6878e88b77ebd77 (patch)
tree11646fc41d0d81e6ad0c076fc2d4f3aa048fee75 /src/northbridge/amd/agesa/family15/northbridge.c
parent7874e9dcfc710402a692c4f36bae78d453b27ccc (diff)
AMD northbridge: copy TOP_MEM and TOP_MEM2 for distribution
Take a copy of BSP CPU's TOP_MEM and TOP_MEM2 MSRs to be distributed to AP CPUs and factor out the debugging info from setup_uma_memory(). Change-Id: I1acb4eaa3fe118aee223df1ebff997289f5d3a56 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1387 Tested-by: build bot (Jenkins) Reviewed-by: Zheng Bao <zheng.bao@amd.com> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/northbridge/amd/agesa/family15/northbridge.c')
-rw-r--r--src/northbridge/amd/agesa/family15/northbridge.c22
1 files changed, 5 insertions, 17 deletions
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index d9a153b53b..96cfca2f8a 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -632,20 +632,9 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
static void setup_uma_memory(void)
{
#if CONFIG_GFXUMA
- msr_t msr, msr2;
+ uint32_t topmem = (uint32_t) bsp_topmem();
uint32_t sys_mem;
- /* TOP_MEM: the top of DRAM below 4G */
- msr = rdmsr(TOP_MEM);
- printk
- (BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n",
- __func__, msr.lo, msr.hi);
-
- /* TOP_MEM2: the top of DRAM above 4G */
- msr2 = rdmsr(TOP_MEM2);
- printk (BIOS_INFO, "%s, TOP MEM2: msr2.lo = 0x%08x, msr2.hi = 0x%08x\n",
- __func__, msr2.lo, msr2.hi);
-
/* refer to UMA Size Consideration in Family15h BKDG. */
/* Please reference MemNGetUmaSizeOR () */
/*
@@ -654,20 +643,18 @@ static void setup_uma_memory(void)
* >=1G 256M
* <1G 64M
*/
- sys_mem = msr.lo + (16 << ONE_MB_SHIFT); // Ignore 16MB allocated for C6 when finding UMA size
- if ((msr2.hi & 0x0000000F) || (sys_mem >= 2048 << ONE_MB_SHIFT)) {
+ sys_mem = topmem + (16 << ONE_MB_SHIFT); // Ignore 16MB allocated for C6 when finding UMA size
+ if ((bsp_topmem2()>>32) || (sys_mem >= 2048 << ONE_MB_SHIFT)) {
uma_memory_size = 512 << ONE_MB_SHIFT;
} else if (sys_mem >= 1024 << ONE_MB_SHIFT) {
uma_memory_size = 256 << ONE_MB_SHIFT;
} else {
uma_memory_size = 64 << ONE_MB_SHIFT;
}
- uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */
+ uma_memory_base = topmem - uma_memory_size; /* TOP_MEM1 */
printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n",
__func__, uma_memory_size, uma_memory_base);
-
- /* TODO: TOP_MEM2 */
#endif
}
@@ -686,6 +673,7 @@ static void domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
+ setup_bsp_ramtop();
setup_uma_memory();
#if CONFIG_PCI_64BIT_PREF_MEM