diff options
| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-11-20 19:58:09 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-11-24 05:37:50 +0100 |
| commit | ae5fd3453a61d95b9f786b4412cb1705563e81cb (patch) | |
| tree | 17a8701b047d2576cbc2282cf0003cad71c856e8 /src/northbridge/amd/agesa/family14 | |
| parent | 9e999d6a14783ae15bf7f6d8843ea667fd8888e7 (diff) | |
northbridge/amd/agesa/family1{4,5,5tn,6kb}: Reduce differences
Lets cut down on whitespace differences, fix some typos and indents.
Also make use of ARRAY_SIZE() macro instead of a local redefinition.
Fix NULL pointer checks ordering and not to use zero.
Change-Id: I93f344d300c04570d795659d848255cb1832e1d8
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7528
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/northbridge/amd/agesa/family14')
| -rw-r--r-- | src/northbridge/amd/agesa/family14/Kconfig | 4 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family14/dimmSpd.c | 10 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family14/northbridge.h | 6 |
3 files changed, 11 insertions, 9 deletions
diff --git a/src/northbridge/amd/agesa/family14/Kconfig b/src/northbridge/amd/agesa/family14/Kconfig index e0edebc10e..971f271f2f 100644 --- a/src/northbridge/amd/agesa/family14/Kconfig +++ b/src/northbridge/amd/agesa/family14/Kconfig @@ -32,10 +32,10 @@ config HW_MEM_HOLE_SIZE_AUTO_INC config MMCONF_BASE_ADDRESS hex - default 0xf8000000 + default 0xF8000000 config MMCONF_BUS_NUMBER int default 16 -endif +endif # NORTHBRIDGE_AMD_AGESA_FAMILY14 diff --git a/src/northbridge/amd/agesa/family14/dimmSpd.c b/src/northbridge/amd/agesa/family14/dimmSpd.c index 4a0cd2ad59..6ca2ce1f55 100644 --- a/src/northbridge/amd/agesa/family14/dimmSpd.c +++ b/src/northbridge/amd/agesa/family14/dimmSpd.c @@ -34,19 +34,21 @@ //#pragma optimize ("", off) /** - * Gets the SMBUS address for an SPD from the array in devicetree.cb + * Gets the SMBus address for an SPD from the array in devicetree.cb * then read the SPD into the supplied buffer. */ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info) { UINT8 spdAddress; + ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); - ROMSTAGE_CONST struct northbridge_amd_agesa_family14_config *config = NULL; + if (dev == NULL) + return AGESA_ERROR; - if ((dev == 0) || (dev->chip_info == 0)) + ROMSTAGE_CONST struct northbridge_amd_agesa_family14_config *config = dev->chip_info; + if (config == NULL) return AGESA_ERROR; - config = dev->chip_info; if (info->SocketId >= ARRAY_SIZE(config->spdAddrLookup)) return AGESA_ERROR; if (info->MemChannelId >= ARRAY_SIZE(config->spdAddrLookup[0])) diff --git a/src/northbridge/amd/agesa/family14/northbridge.h b/src/northbridge/amd/agesa/family14/northbridge.h index 474e74c08a..c5ee7b236a 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.h +++ b/src/northbridge/amd/agesa/family14/northbridge.h @@ -17,12 +17,12 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef NORTHBRIDGE_AMD_AGESA_FAM14H_H -#define NORTHBRIDGE_AMD_AGESA_FAM14H_H +#ifndef NORTHBRIDGE_AMD_AGESA_FAM14_H +#define NORTHBRIDGE_AMD_AGESA_FAM14_H static struct device_operations pci_domain_ops; static struct device_operations cpu_bus_ops; device_t get_node_pci(u32 nodeid, u32 fn); -#endif /* NORTHBRIDGE_AMD_AGESA_FAM14H_H */ +#endif /* NORTHBRIDGE_AMD_AGESA_FAM14_H */ |