diff options
| author | Martin Roth <martinroth@google.com> | 2017-06-24 14:45:48 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-08 19:01:19 +0000 |
| commit | 77a58b92e8d44d17b9aa06710ed728a697722b4a (patch) | |
| tree | cd934fee0c39aa741bbad7112375877e3b05e9e8 /src/northbridge/amd/agesa/family10/northbridge.c | |
| parent | 3c35ad90534d4aebd6d9723e4614efb6af01f45c (diff) | |
nb/amd: add IS_ENABLED() around Kconfig symbol references
Some of these can be changed from #if to if(), but that will happen
in a follow-on commmit.
Change-Id: I763cbbc31dcd4cdd128c04793a742ab6daaf5f0c
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20345
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/northbridge/amd/agesa/family10/northbridge.c')
| -rw-r--r-- | src/northbridge/amd/agesa/family10/northbridge.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c index 15693b797c..d80fa55d8f 100644 --- a/src/northbridge/amd/agesa/family10/northbridge.c +++ b/src/northbridge/amd/agesa/family10/northbridge.c @@ -27,7 +27,7 @@ #include <cpu/x86/lapic.h> #include <cbmem.h> -#if CONFIG_LOGICAL_CPUS +#if IS_ENABLED(CONFIG_LOGICAL_CPUS) #include <pc80/mc146818rtc.h> #endif @@ -496,7 +496,7 @@ static void amdfam10_create_vga_resource(device_t dev, unsigned nodeid) * we only deal with the 'first' vga card */ for (link = dev->link_list; link; link = link->next) { if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) { -#if CONFIG_MULTIPLE_VGA_ADAPTERS +#if IS_ENABLED(CONFIG_MULTIPLE_VGA_ADAPTERS) extern device_t vga_pri; // the primary vga device, defined in device.c printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d bus range [%d,%d]\n", vga_pri->bus->secondary, link->secondary,link->subordinate); @@ -800,7 +800,7 @@ static void amdfam10_domain_set_resources(device_t dev) ramtop = limitk * 1024; } -#if CONFIG_GFXUMA +#if IS_ENABLED(CONFIG_GFXUMA) set_top_of_ram(uma_memory_base); uma_resource(dev, 7, uma_memory_base >> 10, uma_memory_size >> 10); #else @@ -942,7 +942,7 @@ static void cpu_bus_scan(device_t dev) } disable_siblings = !CONFIG_LOGICAL_CPUS; -#if CONFIG_LOGICAL_CPUS +#if IS_ENABLED(CONFIG_LOGICAL_CPUS) get_option(&disable_siblings, "multi_core"); #endif @@ -1117,7 +1117,7 @@ static void root_complex_enable_dev(struct device *dev) the global uma_memory variables already in its enable function. */ if (!done) { setup_bsp_ramtop(); -#if CONFIG_GFXUMA +#if IS_ENABLED(CONFIG_GFXUMA) #error Northbridge does not set uma_memory_base or uma_memory_size. setup_uma_memory(); #endif |