diff options
| author | Seunghwan Kim <sh_.kim@samsung.com> | 2018-08-01 15:05:49 +0900 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2018-08-07 02:39:35 +0000 |
| commit | fcba4272293c2094b961e63bc11b5ab365104092 (patch) | |
| tree | 1ed138be5c02189b5b377f8c06a694e371180497 /src/mainboard | |
| parent | fb10ceb8a71f0c6d2bc3866562f946c04bcd1211 (diff) | |
mb/google/poppy/variants/nautilus: Set CABC_EN to GPO high before EDP power on
If GPP_E22(CABC_EN) remained floating GPI(SoC default) at V3.3_DX_EDP on,
it may cause damage on the GPIO pad.
To prevent, we would set this pad to GPO on romstage before EDP power on.
Since we need to cover all systems in market, I put it into romstage
instead of early_gpio_table.
BUG=b:111860510
BRANCH=poppy
TEST=Verified CABC_EN is set to GPO high 5ms before EDP power on
Change-Id: I34e2fe86329a88eb05e0ea3c6beac6a64754b41e
Signed-off-by: Seunghwan Kim <sh_.kim@samsung.com>
Reviewed-on: https://review.coreboot.org/27773
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/poppy/variants/nautilus/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/mainboard/google/poppy/variants/nautilus/gpio.c | 11 |
2 files changed, 12 insertions, 0 deletions
diff --git a/src/mainboard/google/poppy/variants/nautilus/Makefile.inc b/src/mainboard/google/poppy/variants/nautilus/Makefile.inc index dba5ca68cb..d52893e50f 100644 --- a/src/mainboard/google/poppy/variants/nautilus/Makefile.inc +++ b/src/mainboard/google/poppy/variants/nautilus/Makefile.inc @@ -6,6 +6,7 @@ SPD_SOURCES += samsung_dimm_K4EBE304EB-EGCG # 0b0010 bootblock-y += gpio.c romstage-y += memory.c +romstage-y += gpio.c ramstage-y += gpio.c ramstage-y += nhlt.c diff --git a/src/mainboard/google/poppy/variants/nautilus/gpio.c b/src/mainboard/google/poppy/variants/nautilus/gpio.c index 75d4ce9224..4f80e2f301 100644 --- a/src/mainboard/google/poppy/variants/nautilus/gpio.c +++ b/src/mainboard/google/poppy/variants/nautilus/gpio.c @@ -416,3 +416,14 @@ const struct pad_config *variant_sku_gpio_table(size_t *num) } return board_gpio_tables; } + +static const struct pad_config romstage_gpio_table[] = { + /* E22 : DDPD_CTRLCLK ==> CHP1_CABC */ + PAD_CFG_GPO(GPP_E22, 1, DEEP), +}; + +const struct pad_config *variant_romstage_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(romstage_gpio_table); + return romstage_gpio_table; +} |