diff options
author | Aaron Durbin <adurbin@chromium.org> | 2016-08-30 17:05:31 -0500 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2016-09-01 00:20:37 +0200 |
commit | f0cd74dd84fafa6b2f4410dc876ce0bd7eff3b6a (patch) | |
tree | cd65343d5c248278e7b823e8601f76bccdc8e316 /src/mainboard | |
parent | 3681de8ab6858752c61047a5966b8f6c695437ce (diff) |
mainboard/google/reef: fix polarity of FP_INT
The formerly name FP_INT_L net is actually active high and is push-pull.
Therefore adjust for the new net name, FP_INT, and polarity. The
pulldowns are there because the device is on another board that isn't
always available.
BUG=chrome-os-partner:56740
Change-Id: I6706fd2c2bd164cf3b5f1457aef69f5675f2112d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/16375
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/google/reef/gpio.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/reef/gpio.h b/src/mainboard/google/reef/gpio.h index 09c1ee9355..bf43d3e732 100644 --- a/src/mainboard/google/reef/gpio.h +++ b/src/mainboard/google/reef/gpio.h @@ -290,7 +290,7 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPI_SCI_LOW(GPIO_11, NONE, DEEP, EDGE_SINGLE), /* EC SCI */ PAD_CFG_GPI(GPIO_12, UP_20K, DEEP), /* unused */ PAD_CFG_GPI(GPIO_13, UP_20K, DEEP), /* unused */ - PAD_CFG_GPI_APIC_LOW(GPIO_14, UP_20K, DEEP), /* FP IRQ */ + PAD_CFG_GPI_APIC_HIGH(GPIO_14, DN_20K, DEEP), /* FP_INT */ PAD_CFG_GPI(GPIO_16, UP_20K, DEEP), /* unused */ PAD_CFG_GPI(GPIO_17, UP_20K, DEEP), /* unused */ PAD_CFG_GPI_APIC_LOW(GPIO_18, NONE, DEEP), /* Trackpad IRQ */ @@ -378,7 +378,7 @@ static const struct pad_config proto_diff_table[] = { /* Wake peripheral signals post proto. */ static const struct pad_config nonproto_diff_table[] = { - PAD_CFG_GPI_SCI_LOW(GPIO_3, UP_20K, DEEP, LEVEL), /* FP_INT_L */ + PAD_CFG_GPI_SCI_HIGH(GPIO_3, DN_20K, DEEP, LEVEL), /* FP_INT */ PAD_CFG_GPI_SCI_LOW(GPIO_15, NONE, DEEP, EDGE_SINGLE), /* TRACKPAD_INT_1V8_ODL */ PAD_CFG_GPO(GPIO_44, 1, DEEP), /* GPS_RST_ODL */ PAD_CFG_GPO(PMU_WAKE_B, 1, DEEP), /* EN_PP3300_EMMC */ |