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authorJoey Peng <joey.peng@lcfc.corp-partner.google.com>2022-01-27 10:59:38 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-02-09 21:38:03 +0000
commitefe0fe2674851ca0decc8ac99f3e2455dbaa0668 (patch)
treea18f877f266505a05c7304d0abd3a695581bef97 /src/mainboard
parent1e25fd426ad848f79e7ee7f7de4d3dc3ca129b1f (diff)
mb/google/brya/var/taeko: Add new FW_CONFIG option for DB_USB
Enable USB Port A on daughterboard for Taeko BUG=b:216533764 TEST=emerge-brya coreboot Signed-off-by: Joey Peng <joey.peng@lcfc.corp-partner.google.com> Change-Id: I1a43c256757f3fc4b53ba1f794587d6a00ba0aa5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61412 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/brya/variants/taeko/overridetree.cb22
1 files changed, 22 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/taeko/overridetree.cb b/src/mainboard/google/brya/variants/taeko/overridetree.cb
index 2bddcd7c93..b70b05eac1 100644
--- a/src/mainboard/google/brya/variants/taeko/overridetree.cb
+++ b/src/mainboard/google/brya/variants/taeko/overridetree.cb
@@ -2,6 +2,7 @@ fw_config
field DB_USB 0 1
option DB_USB_ABSENT 0
option DB_USB3_NO_A 1
+ option DB_USB3_1C_1A 2
end
field DB_SD 2 3
option DB_SD_ABSENT 0
@@ -65,6 +66,9 @@ chip soc/intel/alderlake
register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable Port 1
register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC2)" # DB USB2_C1
register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable M.2 WWAN
+ register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # DB Type-A Port A1
+
+ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC3)" # USB3/2 Type A port A1
register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Disable M.2 WWAN
# Intel Common SoC Config
@@ -475,6 +479,7 @@ chip soc/intel/alderlake
.group = ACPI_PLD_GROUP(2, 1)}"
device ref tcss_usb3_port3 on
probe DB_USB DB_USB3_NO_A
+ probe DB_USB DB_USB3_1C_1A
end
end
end
@@ -507,6 +512,7 @@ chip soc/intel/alderlake
.group = ACPI_PLD_GROUP(2, 1)}"
device ref usb2_port3 on
probe DB_USB DB_USB3_NO_A
+ probe DB_USB DB_USB3_1C_1A
end
end
chip drivers/usb/acpi
@@ -516,6 +522,14 @@ chip soc/intel/alderlake
end
end
chip drivers/usb/acpi
+ register "desc" = ""USB2 Type-A Port (DB)""
+ register "type" = "UPC_TYPE_A"
+ register "group" = "ACPI_PLD_GROUP(3, 1)"
+ device ref usb2_port7 on
+ probe DB_USB DB_USB3_1C_1A
+ end
+ end
+ chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port (MLB)""
register "type" = "UPC_TYPE_A"
register "use_custom_pld" = "true"
@@ -546,6 +560,14 @@ chip soc/intel/alderlake
.group = ACPI_PLD_GROUP(4, 1)}"
device ref usb3_port1 on end
end
+ chip drivers/usb/acpi
+ register "desc" = ""USB3 Type-A Port (DB)""
+ register "type" = "UPC_TYPE_USB3_A"
+ register "group" = "ACPI_PLD_GROUP(3, 1)"
+ device ref usb3_port3 on
+ probe DB_USB DB_USB3_1C_1A
+ end
+ end
end
end
end