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authorFrank Wu <frank_wu@compal.corp-partner.google.com>2022-03-29 18:26:28 +0800
committerTim Wawrzynczak <twawrzynczak@chromium.org>2022-03-30 15:08:51 +0000
commitebd6dec110f35f6f004fcaf01d2122cced22a247 (patch)
tree03904c2fe1a6b85d202ec37b5802281358c30e87 /src/mainboard
parent1c27671504c1e2cb4a3d858bf2ce1a946f9c8cdb (diff)
mb/google/brya/var/banshee: Update the GPP_D12 as USB_C3_LSX_RX
Update the GPP_D12 according to USB_C3_LSX_RX. BUG=b:225081954 BRANCH=firmware-brya-14505.B TEST=emerge-brya coreboot chromeos-bootimage The device can be recognized when it is attached in port3. localhost /sys/bus/thunderbolt/devices # ls 0-0 1-0 1-0:3.1 1-3 domain0 domain1 Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com> Change-Id: I38caa76c855e683eb0587eb67ee9abc91af4545d Reviewed-on: https://review.coreboot.org/c/coreboot/+/63174 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/brya/variants/banshee/gpio.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/banshee/gpio.c b/src/mainboard/google/brya/variants/banshee/gpio.c
index b8f4dab823..ae37c9089a 100644
--- a/src/mainboard/google/brya/variants/banshee/gpio.c
+++ b/src/mainboard/google/brya/variants/banshee/gpio.c
@@ -101,7 +101,8 @@ static const struct pad_config override_gpio_table[] = {
/* D10 : ISH_SPI_CLK ==> USB_C2_LSX_RX_STRAP */
/* D11 : ISH_SPI_MISO ==> USB_C3_LSX_TX */
PAD_CFG_NF_LOCK(GPP_D11, NONE, NF4, LOCK_CONFIG),
- /* D12 : ISH_SPI_MOSI ==> GPP_D12_STRAP */
+ /* D12 : ISH_SPI_MOSI ==> USB_C3_LSX_RX */
+ PAD_CFG_NF_LOCK(GPP_D12, NONE, NF4, LOCK_CONFIG),
/* D13 : ISH_UART0_RXD ==> NC */
PAD_NC_LOCK(GPP_D13, NONE, LOCK_CONFIG),
/* D14 : ISH_UART0_TXD ==> NC */