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authorElyes HAOUAS <ehaouas@noos.fr>2018-06-29 21:41:41 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-07-02 07:39:51 +0000
commite3e3f4f4ed4fee2f739806a81a7323fefe63e96d (patch)
tree56fe3cdaa378ed0e6719fb0b46ca6ec2fa73c110 /src/mainboard
parent21b71ce66b89f7bff7959027d971e9a7786bf219 (diff)
src: Get rid of unneeded whitespace
Change-Id: I3873cc8ff82cb043e4867a6fe8c1f253ab18714a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27295 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/amd/inagua/buildOpts.c4
-rw-r--r--src/mainboard/amd/parmer/buildOpts.c4
-rw-r--r--src/mainboard/lenovo/t400/devicetree.cb2
-rw-r--r--src/mainboard/msi/ms7721/buildOpts.c4
-rw-r--r--src/mainboard/pcengines/apu2/romstage.c4
5 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/amd/inagua/buildOpts.c b/src/mainboard/amd/inagua/buildOpts.c
index ff947a056b..1727e15cf9 100644
--- a/src/mainboard/amd/inagua/buildOpts.c
+++ b/src/mainboard/amd/inagua/buildOpts.c
@@ -36,7 +36,7 @@
/* Select the CPU socket type. */
#define INSTALL_G34_SOCKET_SUPPORT FALSE
-#define INSTALL_C32_SOCKET_SUPPORT FALSE
+#define INSTALL_C32_SOCKET_SUPPORT FALSE
#define INSTALL_S1G3_SOCKET_SUPPORT FALSE
#define INSTALL_S1G4_SOCKET_SUPPORT FALSE
#define INSTALL_ASB2_SOCKET_SUPPORT FALSE
@@ -53,7 +53,7 @@
*/
#define BLDOPT_REMOVE_FAMILY_10_SUPPORT TRUE
-#define BLDOPT_REMOVE_FAMILY_12_SUPPORT TRUE
+#define BLDOPT_REMOVE_FAMILY_12_SUPPORT TRUE
#define BLDOPT_REMOVE_FAMILY_14_SUPPORT FALSE
#define BLDOPT_REMOVE_FAMILY_15_SUPPORT TRUE
diff --git a/src/mainboard/amd/parmer/buildOpts.c b/src/mainboard/amd/parmer/buildOpts.c
index af2046d81c..c55cf2cb3b 100644
--- a/src/mainboard/amd/parmer/buildOpts.c
+++ b/src/mainboard/amd/parmer/buildOpts.c
@@ -155,8 +155,8 @@
#if IS_ENABLED(CONFIG_GFXUMA)
#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED
#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
-//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/
-#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
+//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/
+#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE
#endif
diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb
index 0c72c86ed5..59458690a9 100644
--- a/src/mainboard/lenovo/t400/devicetree.cb
+++ b/src/mainboard/lenovo/t400/devicetree.cb
@@ -237,7 +237,7 @@ chip northbridge/intel/gm45
device pci 1f.3 on # SMBus
subsystemid 0x17aa 0x20f9
ioapic_irq 2 INTC 0x12
- # eeprom, 8 virtual devices, same chip
+ # eeprom, 8 virtual devices, same chip
chip drivers/i2c/at24rf08c
device i2c 54 on end
device i2c 55 on end
diff --git a/src/mainboard/msi/ms7721/buildOpts.c b/src/mainboard/msi/ms7721/buildOpts.c
index adcb41797e..f160745fcd 100644
--- a/src/mainboard/msi/ms7721/buildOpts.c
+++ b/src/mainboard/msi/ms7721/buildOpts.c
@@ -170,8 +170,8 @@
#if IS_ENABLED(CONFIG_GFXUMA)
#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED
#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
-//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/
-#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
+//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/
+#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE
#endif
diff --git a/src/mainboard/pcengines/apu2/romstage.c b/src/mainboard/pcengines/apu2/romstage.c
index 093cad6e01..7ea89b8747 100644
--- a/src/mainboard/pcengines/apu2/romstage.c
+++ b/src/mainboard/pcengines/apu2/romstage.c
@@ -74,8 +74,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Load MPB */
val = cpuid_eax(1);
- printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
- printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
+ printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
+ printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
post_code(0x37);
AGESAWRAPPER(amdinitreset);