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authorStefan Reinauer <stepan@coresystems.de>2010-09-30 07:56:12 +0000
committerStefan Reinauer <stepan@openbios.org>2010-09-30 07:56:12 +0000
commitd4d0a456d349002642c1c7e508f2729f1497ab96 (patch)
treec563151e154ca26f6a56a9da0221235223c7718c /src/mainboard
parent011d0d86b0269ab1f5c07db9ecdf27676e1073c9 (diff)
fix Kontron KT690 and clean up socket S1G1 boards accordingly.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/amd/dbm690t/Kconfig12
-rw-r--r--src/mainboard/technexion/tim5690/Kconfig12
-rw-r--r--src/mainboard/technexion/tim8690/Kconfig12
3 files changed, 0 insertions, 36 deletions
diff --git a/src/mainboard/amd/dbm690t/Kconfig b/src/mainboard/amd/dbm690t/Kconfig
index 5720a898f3..13d076bd44 100644
--- a/src/mainboard/amd/dbm690t/Kconfig
+++ b/src/mainboard/amd/dbm690t/Kconfig
@@ -25,18 +25,6 @@ config MAINBOARD_DIR
string
default amd/dbm690t
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
-
-config DCACHE_RAM_SIZE
- hex
- default 0x08000
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x01000
-
config APIC_ID_OFFSET
hex
default 0x0
diff --git a/src/mainboard/technexion/tim5690/Kconfig b/src/mainboard/technexion/tim5690/Kconfig
index 201183ce4e..663a0e044e 100644
--- a/src/mainboard/technexion/tim5690/Kconfig
+++ b/src/mainboard/technexion/tim5690/Kconfig
@@ -26,18 +26,6 @@ config MAINBOARD_DIR
string
default technexion/tim5690
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
-
-config DCACHE_RAM_SIZE
- hex
- default 0x08000
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x01000
-
config APIC_ID_OFFSET
hex
default 0x0
diff --git a/src/mainboard/technexion/tim8690/Kconfig b/src/mainboard/technexion/tim8690/Kconfig
index 47e85a3bcc..07cad0f5f5 100644
--- a/src/mainboard/technexion/tim8690/Kconfig
+++ b/src/mainboard/technexion/tim8690/Kconfig
@@ -25,18 +25,6 @@ config MAINBOARD_DIR
string
default technexion/tim8690
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
-
-config DCACHE_RAM_SIZE
- hex
- default 0x08000
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x01000
-
config APIC_ID_OFFSET
hex
default 0x0