diff options
| author | jinkun.hong <jinkun.hong@rock-chips.com> | 2015-07-23 11:51:51 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-07-29 19:27:32 +0200 |
| commit | d4c9346c3f8900b4b534f62bb0c02f727df22e07 (patch) | |
| tree | d164b14568d1244fd02a19a510f571da2c122efb /src/mainboard | |
| parent | 3bc4373797d34fe90efb2c8263a864f74879e613 (diff) | |
veyron: update mickey sdram-lpddr3-samsung-2GB.inc
Modify MR3_I/O Configuration, Change 34.3 ohms to 60 ohms. This
resolves an issue that was observed on some Mickey boards with
the Samsung 2GB LPDDR3 and is believed to be caused by inferior
routing on the small PCB. (Elpida 2GB LPDDR3 seems unaffected.)
BUG=chrome-os-partner:41905
TEST=Boot from mickey
BRANCH=None
Change-Id: Ic20d9eceb00658c214fd032a2f213dbe0d51a91b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1305010aee6818910ad1dec26d9d948505ca281e
Original-Change-Id: I5517e07fc5716ed4cd58e5502f13ccd61ffb5357
Original-Signed-off-by: jinkun.hong <jinkun.hong@rock-chips.com>
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/286333
Reviewed-on: http://review.coreboot.org/11051
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB.inc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB.inc index 0f15ba5074..cc39f621c2 100644 --- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB.inc +++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB.inc @@ -65,7 +65,8 @@ .mr[0] = 0x0, .mr[1] = 0xC3, .mr[2] = 0x6, - .mr[3] = 0x1 + /* 60Ohms instead of 34.3 due to bad PCB routing on Mickey. */ + .mr[3] = 0x4 }, .noc_timing = 0x20D266A4, .noc_activate = 0x5B6, |