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authorSubrata Banik <subratabanik@google.com>2022-01-03 19:35:35 +0000
committerSubrata Banik <subratabanik@google.com>2022-01-05 06:30:40 +0000
commitc045b099e460899a89c85727dda84a77e62fa072 (patch)
treeff70767a5220a3f968f524b63a7abe4459d19b61 /src/mainboard
parent8b63dac06184e56ce40d82d982e983ac79163551 (diff)
mb/starlabs/labtop: Replace leading whitespace with tab
Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I4d7324148ba182d0317b1f64e39f04a8a55fe79b Reviewed-on: https://review.coreboot.org/c/coreboot/+/60733 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Sean Rhodes <admin@starlabs.systems> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb b/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb
index 2e001c6481..0b789146ae 100644
--- a/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb
+++ b/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb
@@ -22,7 +22,7 @@ chip soc/intel/tigerlake
register "enable_c6dram" = "1"
register "HeciEnabled" = "1"
register "SaGv" = "SaGv_Enabled"
- register "TcssD3ColdDisable" = "1"
+ register "TcssD3ColdDisable" = "1"
# FSP Silicon
# Serial I/O