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authorMario Scheithauer <mario.scheithauer@siemens.com>2023-07-12 13:39:54 +0200
committerWerner Zeh <werner.zeh@siemens.com>2023-07-13 10:42:53 +0000
commitb6940dfdae114bfe536c41c96aa72701d1a510e8 (patch)
treea783395988b2da75df1f6b0b680bbe8ea9c7ac80 /src/mainboard
parent7ecc36647009ae66168d2b8b3044831b08764e73 (diff)
mb/siemens/mc_ehl4: Change GPIO GPP_B5 polarity for DRAM population
With the latest hardware revision, the polarity of GPP_B5 has been changed. For a full-populated DRAM configuration, the input signal is now connected to 3.3 V and for a half-populated configuration it is connected to ground. BUG=none TEST=Use different populated mainboards and check coreboot log GPP_B5 = 0: [INFO ] meminit_channels: DRAM half-populated [DEBUG] 1 DIMMs found GPP_B5 = 1: [DEBUG] 2 DIMMs found Change-Id: Iaa3a63fa52c802d8f5d8c6cc11dd6edfac117e88 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76434 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Jan Samek <jan.samek@siemens.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl4/memory.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/memory.c b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/memory.c
index dc0f073201..f5638d5144 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/memory.c
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/memory.c
@@ -63,5 +63,5 @@ bool half_populated(void)
/* There are two different memory expansion variants of this mainboard.
The GPIO GPP_B5 indicates whether the mainboard is equipped with half- or
full-populated DRAM. */
- return gpio_get(GPP_B5);
+ return !gpio_get(GPP_B5);
}