diff options
| author | Nico Huber <nico.h@gmx.de> | 2018-05-26 17:47:42 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2018-05-31 15:08:48 +0000 |
| commit | b4953a93aa855afcf801d6f7d48df18f31ee2598 (patch) | |
| tree | 169121e3fe449dca2a8707c510cf44434df9f28b /src/mainboard | |
| parent | c51df93ccfefb1a5d1dd763d5b8f400c928593a0 (diff) | |
cpu/x86/mtrr: Get rid of CACHE_ROM_SIZE_OVERRIDE
As far as I can see this Kconfig option was used wrong ever since it
was added. According to the commit message of 107f72e (Re-declare
CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR), it was only necessary
to prevent overlapping with CAR.
Let's handle the potential overlap in C macros instead and get rid
of that option. Currently, it was only used by most FSP1.0 boards,
and only because the `fsp1_0/Kconfig` set it to CBFS_SIZE (WTF?).
Change-Id: I4d0096f14a9d343c2e646e48175fe2127198a822
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/26566
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/adi/rcc-dff/Kconfig | 4 | ||||
| -rw-r--r-- | src/mainboard/esd/atom15/Kconfig | 4 | ||||
| -rw-r--r-- | src/mainboard/intel/bayleybay_fsp/Kconfig | 4 | ||||
| -rw-r--r-- | src/mainboard/intel/camelbackmountain_fsp/Kconfig | 4 | ||||
| -rw-r--r-- | src/mainboard/intel/minnowmax/Kconfig | 4 | ||||
| -rw-r--r-- | src/mainboard/intel/mohonpeak/Kconfig | 4 | ||||
| -rw-r--r-- | src/mainboard/ocp/monolake/Kconfig | 4 | ||||
| -rw-r--r-- | src/mainboard/ocp/wedge100s/Kconfig | 4 | ||||
| -rw-r--r-- | src/mainboard/siemens/mc_bdx1/Kconfig | 4 | ||||
| -rw-r--r-- | src/mainboard/siemens/mc_tcu3/Kconfig | 4 |
10 files changed, 0 insertions, 40 deletions
diff --git a/src/mainboard/adi/rcc-dff/Kconfig b/src/mainboard/adi/rcc-dff/Kconfig index b3559346b3..0673446bd3 100644 --- a/src/mainboard/adi/rcc-dff/Kconfig +++ b/src/mainboard/adi/rcc-dff/Kconfig @@ -37,10 +37,6 @@ config MAX_CPUS int default 16 -config CACHE_ROM_SIZE_OVERRIDE - hex - default 0x800000 - config FSP_FILE string default "../intel/fsp/rangeley/FvFsp.bin" diff --git a/src/mainboard/esd/atom15/Kconfig b/src/mainboard/esd/atom15/Kconfig index 814177e3e6..8568c5169a 100644 --- a/src/mainboard/esd/atom15/Kconfig +++ b/src/mainboard/esd/atom15/Kconfig @@ -36,10 +36,6 @@ config MAX_CPUS int default 16 -config CACHE_ROM_SIZE_OVERRIDE - hex - default 0x800000 - config FSP_FILE string default "../intel/fsp/baytrail/BAYTRAIL_FSP.fd" diff --git a/src/mainboard/intel/bayleybay_fsp/Kconfig b/src/mainboard/intel/bayleybay_fsp/Kconfig index e8318cb0f2..7f74342427 100644 --- a/src/mainboard/intel/bayleybay_fsp/Kconfig +++ b/src/mainboard/intel/bayleybay_fsp/Kconfig @@ -38,10 +38,6 @@ config MAX_CPUS int default 16 -config CACHE_ROM_SIZE_OVERRIDE - hex - default 0x800000 - config FSP_FILE string default "../intel/fsp/baytrail/BAYTRAIL_FSP_ECC.fd" if BOARD_INTEL_BAKERSPORT_FSP diff --git a/src/mainboard/intel/camelbackmountain_fsp/Kconfig b/src/mainboard/intel/camelbackmountain_fsp/Kconfig index 3d29e2e3c4..295091f889 100644 --- a/src/mainboard/intel/camelbackmountain_fsp/Kconfig +++ b/src/mainboard/intel/camelbackmountain_fsp/Kconfig @@ -23,10 +23,6 @@ config IRQ_SLOT_COUNT int default 18 -config CACHE_ROM_SIZE_OVERRIDE - hex - default 0x800000 - config CBFS_SIZE hex default 0x00200000 diff --git a/src/mainboard/intel/minnowmax/Kconfig b/src/mainboard/intel/minnowmax/Kconfig index f0c4526f6a..4f7d25da0c 100644 --- a/src/mainboard/intel/minnowmax/Kconfig +++ b/src/mainboard/intel/minnowmax/Kconfig @@ -36,10 +36,6 @@ config MAX_CPUS int default 16 -config CACHE_ROM_SIZE_OVERRIDE - hex - default 0x800000 - config FSP_FILE string default "../intel/fsp/baytrail/BAYTRAIL_FSP.fd" diff --git a/src/mainboard/intel/mohonpeak/Kconfig b/src/mainboard/intel/mohonpeak/Kconfig index 207944e6c2..3a7538f3e8 100644 --- a/src/mainboard/intel/mohonpeak/Kconfig +++ b/src/mainboard/intel/mohonpeak/Kconfig @@ -37,10 +37,6 @@ config MAX_CPUS int default 16 -config CACHE_ROM_SIZE_OVERRIDE - hex - default 0x800000 - config FSP_FILE string default "../intel/fsp/rangeley/FvFsp.bin" diff --git a/src/mainboard/ocp/monolake/Kconfig b/src/mainboard/ocp/monolake/Kconfig index 2f253f0cee..09678c7053 100644 --- a/src/mainboard/ocp/monolake/Kconfig +++ b/src/mainboard/ocp/monolake/Kconfig @@ -23,10 +23,6 @@ config IRQ_SLOT_COUNT int default 18 -config CACHE_ROM_SIZE_OVERRIDE - hex - default 0x800000 - config CBFS_SIZE hex default 0x00200000 diff --git a/src/mainboard/ocp/wedge100s/Kconfig b/src/mainboard/ocp/wedge100s/Kconfig index dfdc55222e..6a33edbc0d 100644 --- a/src/mainboard/ocp/wedge100s/Kconfig +++ b/src/mainboard/ocp/wedge100s/Kconfig @@ -24,10 +24,6 @@ config IRQ_SLOT_COUNT int default 18 -config CACHE_ROM_SIZE_OVERRIDE - hex - default 0x800000 - config CBFS_SIZE hex default 0x00200000 diff --git a/src/mainboard/siemens/mc_bdx1/Kconfig b/src/mainboard/siemens/mc_bdx1/Kconfig index a24d09dc19..667a6ee688 100644 --- a/src/mainboard/siemens/mc_bdx1/Kconfig +++ b/src/mainboard/siemens/mc_bdx1/Kconfig @@ -27,10 +27,6 @@ config IRQ_SLOT_COUNT int default 18 -config CACHE_ROM_SIZE_OVERRIDE - hex - default 0x1000000 - config CBFS_SIZE hex default 0x00D00000 diff --git a/src/mainboard/siemens/mc_tcu3/Kconfig b/src/mainboard/siemens/mc_tcu3/Kconfig index 6a3b3c4594..4be0060703 100644 --- a/src/mainboard/siemens/mc_tcu3/Kconfig +++ b/src/mainboard/siemens/mc_tcu3/Kconfig @@ -44,10 +44,6 @@ config MAX_CPUS int default 16 -config CACHE_ROM_SIZE_OVERRIDE - hex - default 0x1000000 - config CBFS_SIZE hex default 0x00e00000 |