summaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
authorDavid Wu <david_wu@quanta.corp-partner.google.com>2018-09-13 16:51:14 +0800
committerPatrick Georgi <pgeorgi@google.com>2018-10-19 09:23:23 +0000
commitaceaa71531e39042d98c6029313fc7d49a4c1d2b (patch)
treed55ce389d3eaf9b01b36f5549a1e7a5176533164 /src/mainboard
parent8f45bf2be71ee5608dfda57b5a6ee8a9e909250a (diff)
mb/google/fizz: Provide baseboard and variant concepts
In order to be able to share code across different fizz variants, provide the concept of baseboard and variants. New directory layout: variants/baseboard - code variants/baseboard/include/baseboard - headers variants/fizz - code variants/fizz/include/variant - headers New boards would then add themselves under their board name within "variants" directory. This is purely an organizational change. BUG=b:117066935 BRANCH=Fizz TEST=emerge-fizz coreboot CQ-DEPEND=CL:1273514 Change-Id: I28cc41681e7af88ddeba2e847dc0a4686606feb2 Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/28962 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/fizz/Kconfig8
-rw-r--r--src/mainboard/google/fizz/Makefile.inc6
-rw-r--r--src/mainboard/google/fizz/bootblock.c2
-rw-r--r--src/mainboard/google/fizz/chromeos.c2
-rw-r--r--src/mainboard/google/fizz/dsdt.asl6
-rw-r--r--src/mainboard/google/fizz/ec.c2
-rw-r--r--src/mainboard/google/fizz/mainboard.c2
-rw-r--r--src/mainboard/google/fizz/ramstage.c3
-rw-r--r--src/mainboard/google/fizz/smihandler.c2
-rw-r--r--src/mainboard/google/fizz/variants/baseboard/devicetree.cb (renamed from src/mainboard/google/fizz/devicetree.cb)0
-rw-r--r--src/mainboard/google/fizz/variants/baseboard/include/baseboard/acpi/dptf.asl (renamed from src/mainboard/google/fizz/acpi/dptf.asl)0
-rw-r--r--src/mainboard/google/fizz/variants/baseboard/include/baseboard/ec.h (renamed from src/mainboard/google/fizz/ec.h)6
-rw-r--r--src/mainboard/google/fizz/variants/baseboard/include/baseboard/gpio.h (renamed from src/mainboard/google/fizz/gpio.h)8
-rw-r--r--src/mainboard/google/fizz/variants/fizz/data.vbt (renamed from src/mainboard/google/fizz/data.vbt)bin4608 -> 4608 bytes
-rw-r--r--src/mainboard/google/fizz/variants/fizz/include/variant/acpi/dptf.asl16
-rw-r--r--src/mainboard/google/fizz/variants/fizz/include/variant/ec.h21
-rw-r--r--src/mainboard/google/fizz/variants/fizz/include/variant/gpio.h21
17 files changed, 88 insertions, 17 deletions
diff --git a/src/mainboard/google/fizz/Kconfig b/src/mainboard/google/fizz/Kconfig
index 7f4989bf72..6ab94c910d 100644
--- a/src/mainboard/google/fizz/Kconfig
+++ b/src/mainboard/google/fizz/Kconfig
@@ -25,6 +25,10 @@ config BOARD_GOOGLE_BASEBOARD_FIZZ
if BOARD_GOOGLE_BASEBOARD_FIZZ
+config DEVICETREE
+ string
+ default "variants/baseboard/devicetree.cb"
+
config VBOOT
select EC_GOOGLE_CHROMEEC_SWITCHES
select VBOOT_EC_EFS
@@ -68,6 +72,10 @@ config TPM_TIS_ACPI_INTERRUPT
int
default 64 # GPE0_DW2_00 (GPP_E0)
+config VARIANT_DIR
+ string
+ default "fizz" if BOARD_GOOGLE_FIZZ
+
config INCLUDE_NHLT_BLOBS
bool "Include blobs for audio."
select NHLT_RT5663
diff --git a/src/mainboard/google/fizz/Makefile.inc b/src/mainboard/google/fizz/Makefile.inc
index 534968cbf5..59f84b543a 100644
--- a/src/mainboard/google/fizz/Makefile.inc
+++ b/src/mainboard/google/fizz/Makefile.inc
@@ -26,3 +26,9 @@ ramstage-y += mainboard.c
ramstage-y += ramstage.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
+
+subdirs-y += variants/baseboard
+CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
+
+subdirs-y += variants/$(VARIANT_DIR)
+CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
diff --git a/src/mainboard/google/fizz/bootblock.c b/src/mainboard/google/fizz/bootblock.c
index dc5dde1e50..4114cd55c7 100644
--- a/src/mainboard/google/fizz/bootblock.c
+++ b/src/mainboard/google/fizz/bootblock.c
@@ -16,7 +16,7 @@
#include <bootblock_common.h>
#include <soc/gpio.h>
-#include "gpio.h"
+#include <variant/gpio.h>
static void early_config_gpio(void)
{
diff --git a/src/mainboard/google/fizz/chromeos.c b/src/mainboard/google/fizz/chromeos.c
index e52ac72662..98bee6b0ad 100644
--- a/src/mainboard/google/fizz/chromeos.c
+++ b/src/mainboard/google/fizz/chromeos.c
@@ -18,7 +18,7 @@
#include <soc/gpio.h>
#include <vendorcode/google/chromeos/chromeos.h>
-#include "gpio.h"
+#include <variant/gpio.h>
#if ENV_RAMSTAGE
#include <boot/coreboot_tables.h>
diff --git a/src/mainboard/google/fizz/dsdt.asl b/src/mainboard/google/fizz/dsdt.asl
index dc2fcfa321..8a35197608 100644
--- a/src/mainboard/google/fizz/dsdt.asl
+++ b/src/mainboard/google/fizz/dsdt.asl
@@ -13,8 +13,8 @@
* GNU General Public License for more details.
*/
-#include "ec.h"
-#include "gpio.h"
+#include <variant/ec.h>
+#include <variant/gpio.h>
DefinitionBlock(
"dsdt.aml",
@@ -61,7 +61,7 @@ DefinitionBlock(
Scope (\_SB)
{
/* Dynamic Platform Thermal Framework */
- #include "acpi/dptf.asl"
+ #include <variant/acpi/dptf.asl>
}
/* USB port entries */
diff --git a/src/mainboard/google/fizz/ec.c b/src/mainboard/google/fizz/ec.c
index 6b3ec9e35f..63a32a8c72 100644
--- a/src/mainboard/google/fizz/ec.c
+++ b/src/mainboard/google/fizz/ec.c
@@ -16,7 +16,7 @@
#include <arch/acpi.h>
#include <ec/google/chromeec/ec.h>
-#include "ec.h"
+#include <variant/ec.h>
void mainboard_ec_init(void)
{
diff --git a/src/mainboard/google/fizz/mainboard.c b/src/mainboard/google/fizz/mainboard.c
index 501510c457..9865f407e1 100644
--- a/src/mainboard/google/fizz/mainboard.c
+++ b/src/mainboard/google/fizz/mainboard.c
@@ -20,7 +20,7 @@
#include <ec/ec.h>
#include <ec/google/chromeec/ec.h>
#include <gpio.h>
-#include <mainboard/google/fizz/gpio.h>
+#include <variant/gpio.h>
#include <smbios.h>
#include <soc/gpio.h>
#include <soc/pci_devs.h>
diff --git a/src/mainboard/google/fizz/ramstage.c b/src/mainboard/google/fizz/ramstage.c
index 231ed87973..e208a678f6 100644
--- a/src/mainboard/google/fizz/ramstage.c
+++ b/src/mainboard/google/fizz/ramstage.c
@@ -18,12 +18,11 @@
#include <delay.h>
#include <ec/google/chromeec/ec.h>
#include <gpio.h>
-#include <mainboard/google/fizz/gpio.h>
#include <soc/gpio.h>
#include <soc/ramstage.h>
#include <timer.h>
-#include "gpio.h"
+#include <variant/gpio.h>
#define GPIO_HDMI_HPD GPP_E13
#define GPIO_DP_HPD GPP_E14
diff --git a/src/mainboard/google/fizz/smihandler.c b/src/mainboard/google/fizz/smihandler.c
index 5f05b2e62c..3aa9ddb53a 100644
--- a/src/mainboard/google/fizz/smihandler.c
+++ b/src/mainboard/google/fizz/smihandler.c
@@ -17,7 +17,7 @@
#include <ec/google/chromeec/smm.h>
#include <soc/smm.h>
-#include "ec.h"
+#include <variant/ec.h>
void mainboard_smi_espi_handler(void)
{
diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb
index 281d65ce87..281d65ce87 100644
--- a/src/mainboard/google/fizz/devicetree.cb
+++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb
diff --git a/src/mainboard/google/fizz/acpi/dptf.asl b/src/mainboard/google/fizz/variants/baseboard/include/baseboard/acpi/dptf.asl
index f877c71c03..f877c71c03 100644
--- a/src/mainboard/google/fizz/acpi/dptf.asl
+++ b/src/mainboard/google/fizz/variants/baseboard/include/baseboard/acpi/dptf.asl
diff --git a/src/mainboard/google/fizz/ec.h b/src/mainboard/google/fizz/variants/baseboard/include/baseboard/ec.h
index 4b4044523f..a372f8dfb9 100644
--- a/src/mainboard/google/fizz/ec.h
+++ b/src/mainboard/google/fizz/variants/baseboard/include/baseboard/ec.h
@@ -13,13 +13,13 @@
* GNU General Public License for more details.
*/
-#ifndef __MAINBOARD_EC_H__
-#define __MAINBOARD_EC_H__
+#ifndef __BASEBOARD_EC_H__
+#define __BASEBOARD_EC_H__
#include <ec/ec.h>
#include <ec/google/chromeec/ec_commands.h>
-#include "gpio.h"
+#include <variant/gpio.h>
#define MAINBOARD_EC_SCI_EVENTS \
(EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) |\
diff --git a/src/mainboard/google/fizz/gpio.h b/src/mainboard/google/fizz/variants/baseboard/include/baseboard/gpio.h
index 9a94af4b1a..05d9d038eb 100644
--- a/src/mainboard/google/fizz/gpio.h
+++ b/src/mainboard/google/fizz/variants/baseboard/include/baseboard/gpio.h
@@ -13,8 +13,8 @@
* GNU General Public License for more details.
*/
-#ifndef __MAINBOARD_GPIO_H__
-#define __MAINBOARD_GPIO_H__
+#ifndef __BASEBOARD_GPIO_H__
+#define __BASEBOARD_GPIO_H__
#include <soc/gpe.h>
#include <soc/gpio.h>
@@ -281,6 +281,6 @@ static const struct pad_config early_gpio_table[] = {
/* SATA_DEVSLP1 */ PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1), /* DEVSLP1_MB */
};
-#endif
+#endif /* __ACPI__ */
-#endif
+#endif /* BASEBOARD_GPIO_H */
diff --git a/src/mainboard/google/fizz/data.vbt b/src/mainboard/google/fizz/variants/fizz/data.vbt
index dbbf475f21..dbbf475f21 100644
--- a/src/mainboard/google/fizz/data.vbt
+++ b/src/mainboard/google/fizz/variants/fizz/data.vbt
Binary files differ
diff --git a/src/mainboard/google/fizz/variants/fizz/include/variant/acpi/dptf.asl b/src/mainboard/google/fizz/variants/fizz/include/variant/acpi/dptf.asl
new file mode 100644
index 0000000000..a9afa73115
--- /dev/null
+++ b/src/mainboard/google/fizz/variants/fizz/include/variant/acpi/dptf.asl
@@ -0,0 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <baseboard/acpi/dptf.asl>
diff --git a/src/mainboard/google/fizz/variants/fizz/include/variant/ec.h b/src/mainboard/google/fizz/variants/fizz/include/variant/ec.h
new file mode 100644
index 0000000000..3d4fc8fa53
--- /dev/null
+++ b/src/mainboard/google/fizz/variants/fizz/include/variant/ec.h
@@ -0,0 +1,21 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MAINBOARD_EC_H__
+#define __MAINBOARD_EC_H__
+
+#include <baseboard/ec.h>
+
+#endif /* __MAINBOARD_EC_H__ */
diff --git a/src/mainboard/google/fizz/variants/fizz/include/variant/gpio.h b/src/mainboard/google/fizz/variants/fizz/include/variant/gpio.h
new file mode 100644
index 0000000000..cd34cf060a
--- /dev/null
+++ b/src/mainboard/google/fizz/variants/fizz/include/variant/gpio.h
@@ -0,0 +1,21 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __MAINBOARD_GPIO_H__
+#define __MAINBOARD_GPIO_H__
+
+#include <baseboard/gpio.h>
+
+#endif /* __MAINBOARD_GPIO_H__ */