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authorCliff Huang <cliff.huang@intel.com>2023-01-24 17:14:46 -0800
committerFelix Held <felix-coreboot@felixheld.de>2023-02-16 14:13:09 +0000
commitaa5e3625375c0dc26929c1e7bd35838c0208fc0c (patch)
treec2368c74724a849225cb080fd7b5847ce951b16e /src/mainboard
parent053996283598649d66817a0f7d47a856834962d5 (diff)
mb/intel/adlrvp: Fix RTD3 timing for PCIe slot1
Fix RTD3 timing for adlrvp_p_ext_ec and adlrvp_rpl_ext_ec. BUG=none BRANCH=firmware-brya-14505.B TEST=Insert a SD card or NIC AIC on PCIe slot1 and run 'suspend_stress_test -c 1'. The RP8 should not cause suspend issue. Signed-off-by: Cliff Huang <cliff.huang@intel.com> Change-Id: I792c55a6361d1eae55cc6f668a03dc2503120fe1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72422 Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb4
-rw-r--r--src/mainboard/intel/adlrvp/variants/adlrvp_rpl_ext_ec/overridetree.cb4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb
index c78189f9a5..544f9e251b 100644
--- a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb
+++ b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb
@@ -95,9 +95,9 @@ chip soc/intel/alderlake
}"
chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H17)"
- register "enable_delay_ms" = "50"
+ register "enable_delay_ms" = "100"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F10)"
- register "reset_off_delay_ms" = "20"
+ register "reset_delay_ms" = "20"
register "srcclk_pin" = "7"
device generic 0 on
end
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_rpl_ext_ec/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_rpl_ext_ec/overridetree.cb
index c78189f9a5..544f9e251b 100644
--- a/src/mainboard/intel/adlrvp/variants/adlrvp_rpl_ext_ec/overridetree.cb
+++ b/src/mainboard/intel/adlrvp/variants/adlrvp_rpl_ext_ec/overridetree.cb
@@ -95,9 +95,9 @@ chip soc/intel/alderlake
}"
chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H17)"
- register "enable_delay_ms" = "50"
+ register "enable_delay_ms" = "100"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F10)"
- register "reset_off_delay_ms" = "20"
+ register "reset_delay_ms" = "20"
register "srcclk_pin" = "7"
device generic 0 on
end