Allow to build romstage sources inside the bootblock

Having a separate romstage is only desirable:
 - with advanced setups like vboot or normal/fallback
 - boot medium is slow at startup (some ARM SOCs)
 - bootblock is limited in size (Intel APL 32K)

When this is not the case there is no need for the extra complexity
that romstage brings. Including the romstage sources inside the
bootblock substantially reduces the total code footprint. Often the
resulting code is 10-20k smaller.

This is controlled via a Kconfig option.

TESTED: works on qemu x86, arm and aarch64 with and without VBOOT.

Change-Id: Id68390edc1ba228b121cca89b80c64a92553e284
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55068
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

10 files changed, 20 insertions, 4 deletions

diff --git a/src/mainboard/emulation/qemu-armv7/romstage.c b/src/mainboard/emulation/qemu-armv7/romstage.c
index 598ddde10c..05a75bb80f 100644
--- a/src/mainboard/emulation/qemu-armv7/romstage.c
+++ b/src/mainboard/emulation/qemu-armv7/romstage.c
@@ -5,11 +5,13 @@
 #include <program_loading.h>
 #include <romstage_common.h>
 
+#if CONFIG(SEPARATE_ROMSTAGE)
 void main(void)
 {
 	console_init();
 	romstage_main();
 }
+#endif
 
 void __noreturn romstage_main(void)
 {
diff --git a/src/mainboard/emulation/qemu-riscv/memlayout.ld b/src/mainboard/emulation/qemu-riscv/memlayout.ld
index 96ab74c516..4fdeb9dccb 100644
--- a/src/mainboard/emulation/qemu-riscv/memlayout.ld
+++ b/src/mainboard/emulation/qemu-riscv/memlayout.ld
@@ -17,7 +17,7 @@ SECTIONS
 	SRAM_END(STAGES_START)
 	DRAM_START(STAGES_START)
 
-#if ENV_ROMSTAGE
+#if ENV_SEPARATE_ROMSTAGE
 	ROMSTAGE(STAGES_START, 128K)
 #endif
 #if ENV_RAMSTAGE
diff --git a/src/mainboard/facebook/fbg1701/board_verified_boot.c b/src/mainboard/facebook/fbg1701/board_verified_boot.c
index 4932964409..325acd64b7 100644
--- a/src/mainboard/facebook/fbg1701/board_verified_boot.c
+++ b/src/mainboard/facebook/fbg1701/board_verified_boot.c
@@ -7,8 +7,10 @@
  * items to the TPM
  */
 const verify_item_t bootblock_verify_list[] = {
+#if CONFIG(SEPARATE_ROMSTAGE)
 	{ VERIFY_FILE, ROMSTAGE, { { NULL, CBFS_TYPE_STAGE } },
 		HASH_IDX_ROM_STAGE, MBOOT_PCR_INDEX_0 },
+#endif
 	{ VERIFY_FILE, BOOTBLOCK, { { NULL, CBFS_TYPE_BOOTBLOCK } },
 		HASH_IDX_BOOTBLOCK, MBOOT_PCR_INDEX_0 },
 	{ VERIFY_FILE, FSP, { { NULL, CBFS_TYPE_FSP } }, HASH_IDX_FSP,
diff --git a/src/mainboard/google/butterfly/chromeos.c b/src/mainboard/google/butterfly/chromeos.c
index 4dcf14fd16..595b2ca22e 100644
--- a/src/mainboard/google/butterfly/chromeos.c
+++ b/src/mainboard/google/butterfly/chromeos.c
@@ -39,7 +39,7 @@ int get_lid_switch(void)
 	return (ec_mem_read(EC_HW_GPI_STATUS) >> EC_GPI_LID_STAT_BIT) & 1;
 }
 
-/* FIXME: VBOOT reads this in ENV_ROMSTAGE. */
+/* FIXME: VBOOT reads this in ENV_SEPARATE_ROMSTAGE. */
 int get_recovery_mode_switch(void)
 {
 	if (ENV_RAMSTAGE)
diff --git a/src/mainboard/google/daisy/romstage.c b/src/mainboard/google/daisy/romstage.c
index d9ae00cced..4fa2b3bb9f 100644
--- a/src/mainboard/google/daisy/romstage.c
+++ b/src/mainboard/google/daisy/romstage.c
@@ -118,6 +118,7 @@ static struct mem_timings *setup_clock(void)
 	return mem;
 }
 
+#if CONFIG(SEPARATE_ROMSTAGE)
 void main(void)
 {
 	timestamp_init(timestamp_get());
@@ -126,10 +127,11 @@ void main(void)
 	/*
 	 * From the clocks comment below it looks like serial console won't
 	 * work in the bootblock so keep in the romstage_main flow even with
-	 * !CONFIG  SEPARATE_ROMSTAGE.
+	 * !CONFIG(SEPARATE_ROMSTAGE).
 	 */
 	romstage_main();
 }
+#endif
 
 void __noreturn romstage_main(void)
 {
diff --git a/src/mainboard/google/peach_pit/romstage.c b/src/mainboard/google/peach_pit/romstage.c
index 5a4863d79a..e38d1cb2ce 100644
--- a/src/mainboard/google/peach_pit/romstage.c
+++ b/src/mainboard/google/peach_pit/romstage.c
@@ -202,6 +202,7 @@ static void simple_spi_test(void)
 #define simple_spi_test()
 #endif
 
+#if CONFIG(SEPARATE_ROMSTAGE)
 void main(void)
 {
 	timestamp_init(timestamp_get());
@@ -210,10 +211,11 @@ void main(void)
 	/*
 	 * From the clocks comment below it looks like serial console won't
 	 * work in the bootblock so keep in the romstage_main flow even with
-	 * !CONFIG SEPARATE_ROMSTAGE.
+	 * !CONFIG(SEPARATE_ROMSTAGE).
 	 */
 	romstage_main();
 }
+#endif
 
 void __noreturn romstage_main(void)
 {
diff --git a/src/mainboard/google/veyron/romstage.c b/src/mainboard/google/veyron/romstage.c
index 488f581a76..74714341e5 100644
--- a/src/mainboard/google/veyron/romstage.c
+++ b/src/mainboard/google/veyron/romstage.c
@@ -63,6 +63,7 @@ static void sdmmc_power_off(void)
 	rk808_configure_ldo(5, 0); /* VCC33_SD */
 }
 
+#if CONFIG(SEPARATE_ROMSTAGE)
 void main(void)
 {
 	timestamp_add_now(TS_ROMSTAGE_START);
@@ -72,6 +73,7 @@ void main(void)
 
 	romstage_main();
 }
+#endif
 
 void __noreturn romstage_main(void)
 {
diff --git a/src/mainboard/google/veyron_mickey/romstage.c b/src/mainboard/google/veyron_mickey/romstage.c
index c718ed7966..d202a02de5 100644
--- a/src/mainboard/google/veyron_mickey/romstage.c
+++ b/src/mainboard/google/veyron_mickey/romstage.c
@@ -57,6 +57,7 @@ static void configure_l2ctlr(void)
 	write_l2ctlr(l2ctlr);
 }
 
+#if CONFIG(SEPARATE_ROMSTAGE)
 void main(void)
 {
 	timestamp_add_now(TS_ROMSTAGE_START);
@@ -66,6 +67,7 @@ void main(void)
 
 	romstage_main();
 }
+#endif
 
 void __noreturn romstage_main(void)
 {
diff --git a/src/mainboard/google/veyron_rialto/romstage.c b/src/mainboard/google/veyron_rialto/romstage.c
index 488f581a76..74714341e5 100644
--- a/src/mainboard/google/veyron_rialto/romstage.c
+++ b/src/mainboard/google/veyron_rialto/romstage.c
@@ -63,6 +63,7 @@ static void sdmmc_power_off(void)
 	rk808_configure_ldo(5, 0); /* VCC33_SD */
 }
 
+#if CONFIG(SEPARATE_ROMSTAGE)
 void main(void)
 {
 	timestamp_add_now(TS_ROMSTAGE_START);
@@ -72,6 +73,7 @@ void main(void)
 
 	romstage_main();
 }
+#endif
 
 void __noreturn romstage_main(void)
 {
diff --git a/src/mainboard/ti/beaglebone/romstage.c b/src/mainboard/ti/beaglebone/romstage.c
index da6a182fa5..09fd2a35fc 100644
--- a/src/mainboard/ti/beaglebone/romstage.c
+++ b/src/mainboard/ti/beaglebone/romstage.c
@@ -45,12 +45,14 @@ static struct emif_regs ddr3_beagleblack_emif_reg_data = {
 	.emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
 };
 
+#if CONFIG(SEPARATE_ROMSTAGE)
 void main(void)
 {
 	console_init();
 	printk(BIOS_INFO, "Hello from romstage.\n");
 	romstage_main();
 }
+#endif
 
 void __noreturn romstage_main(void)
 {