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| author | Sean Rhodes <sean@starlabs.systems> | 2022-05-26 22:20:41 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-20 12:07:52 +0000 |
| commit | 9d894b856361f6f8978d6c27557f8dd0bd84d2df (patch) | |
| tree | 63bfee38338730e238f64b1b01526a9b8fc52cee /src/mainboard | |
| parent | 9088b681f539873e70a8904ca41165f3e830232f (diff) | |
soc/intel/apollolake: Hook up C1e to enhanced_cstates
Hook up C1e FSP S UPD which enables enhanced C-states, to
enhanced_cstates. This allows it to be enabled in the
devicetree with a value of "1" as the default is disabled.
C1e exists on both APL and GLK, and has been there since their
initial releases.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ie803a75ac9fb64a6c21b31baeea7b736e4fbf5fa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64708
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard')
0 files changed, 0 insertions, 0 deletions