summaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
authorDerek Huang <derek.huang@intel.corp-partner.google.com>2022-05-03 14:28:06 +0800
committerTim Wawrzynczak <twawrzynczak@chromium.org>2022-06-13 21:29:41 +0000
commit930df1a6fbe084f1a767bf638eb4845cf70b5cc1 (patch)
tree96fcdfb943a306ea0270b7e79b3c5e0e8916d33f /src/mainboard
parent3e940685086ef52b14ff02160dae7c2c96a1a160 (diff)
mb/google/volteer: Fix wrong Type-C port for retimer
This change fixes wrong type-C port number for voxel. Voxel uses tcss_usb3_port1 not tcss_usb3_port3. BUG=b:231344977 BRANCH=volteer TEST=Check the transactions are happening on correct port. Also checked retimer firmware update on both the ports. Signed-off-by: Derek Huang <derek.huang@intel.corp-partner.google.com> Change-Id: Iba7b3b15296bed99d3626a6d53dfd59e8d20fe5f Reviewed-on: https://review.coreboot.org/c/coreboot/+/64022 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Derek Huang <derekhuang@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/volteer/variants/voxel/overridetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/volteer/variants/voxel/overridetree.cb b/src/mainboard/google/volteer/variants/voxel/overridetree.cb
index 4bca103584..a2bb85d512 100644
--- a/src/mainboard/google/volteer/variants/voxel/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/voxel/overridetree.cb
@@ -83,7 +83,7 @@ chip soc/intel/tigerlake
chip drivers/intel/usb4/retimer
register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H10)"
register "dfp[1].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H10)"
- use tcss_usb3_port3 as dfp[0].typec_port
+ use tcss_usb3_port1 as dfp[0].typec_port
use tcss_usb3_port2 as dfp[1].typec_port
device generic 0 on end
end