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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-11-06 12:39:51 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-11-29 17:35:23 +0000
commit88da0b8622ab712fd7c7b0bc5d2258f0ccb48bc4 (patch)
treef26388f544d1d8198200fbd33df7f10171144b02 /src/mainboard
parentf083d5e5a30cbd846712ac895766d673cf767350 (diff)
mb/lippert/frontrunner-af: Use common cpu/ and nb/ ASL files
There are no quad-core CPU models with fam14, \_SB.C002 and .C003 get removed from ASL. Change-Id: I96df5b3f93c2dd6a05d5693069b991ca01f71d73 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50658 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/lippert/frontrunner-af/dsdt.asl116
1 files changed, 4 insertions, 112 deletions
diff --git a/src/mainboard/lippert/frontrunner-af/dsdt.asl b/src/mainboard/lippert/frontrunner-af/dsdt.asl
index 1839b6440f..5f834fc348 100644
--- a/src/mainboard/lippert/frontrunner-af/dsdt.asl
+++ b/src/mainboard/lippert/frontrunner-af/dsdt.asl
@@ -13,29 +13,7 @@ DefinitionBlock (
{ /* Start of ASL file */
#include <acpi/dsdt_top.asl>
-
- /*
- * Processor Object
- *
- */
- Scope (\_SB) { /* define processor scope */
- Device (C000) {
- Name (_HID, "ACPI0007")
- Name (_UID, 0)
- }
- Device (C001) {
- Name (_HID, "ACPI0007")
- Name (_UID, 1)
- }
- Device (C002) {
- Name (_HID, "ACPI0007")
- Name (_UID, 2)
- }
- Device (C003) {
- Name (_HID, "ACPI0007")
- Name (_UID, 3)
- }
- } /* End _SB scope */
+ #include <cpu/amd/agesa/family14/acpi/cpu.asl>
#include <southbridge/amd/cimx/sb800/acpi/misc_io.asl>
@@ -58,10 +36,9 @@ DefinitionBlock (
/* _SB.PCI0 */
/* Note: Only need HID on Primary Bus */
Device(PCI0) {
- External (TOM1)
- External (TOM2)
- Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
- Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
+
+ /* Describe the AMD Northbridge */
+ #include <northbridge/amd/agesa/family14/acpi/northbridge.asl>
/* Operating System Capabilities Method */
Method (_OSC, 4)
@@ -93,91 +70,6 @@ DefinitionBlock (
Return (PR0) /* PIC Mode */
} /* end _PRT */
- /* Describe the Northbridge devices */
- Device(AMRT) {
- Name(_ADR, 0x00000000)
- } /* end AMRT */
-
- /* The internal GFX bridge */
- Device(AGPB) {
- Name(_ADR, 0x00010000)
- Name(_PRW, Package() {0x18, 4})
- Method(_PRT,0) {
- Return (APR1)
- }
- } /* end AGPB */
-
- /* Dev 2 & 3 are external GFX bridges, not used in Family14 */
-
- Device(PBR4) {
- Name(_ADR, 0x00040000)
- Name(_PRW, Package() {0x18, 4})
- Method(_PRT,0) {
- If(PICM){ Return(APS4) } /* APIC mode */
- Return (PS4) /* PIC Mode */
- } /* end _PRT */
- } /* end PBR4 */
-
- Device(PBR5) {
- Name(_ADR, 0x00050000)
- Name(_PRW, Package() {0x18, 4})
- Method(_PRT,0) {
- If(PICM){ Return(APS5) } /* APIC mode */
- Return (PS5) /* PIC Mode */
- } /* end _PRT */
- } /* end PBR5 */
-
- Device(PBR6) {
- Name(_ADR, 0x00060000)
- Name(_PRW, Package() {0x18, 4})
- Method(_PRT,0) {
- If(PICM){ Return(APS6) } /* APIC mode */
- Return (PS6) /* PIC Mode */
- } /* end _PRT */
- } /* end PBR6 */
-
- /* The onboard EtherNet chip */
- Device(PBR7) {
- Name(_ADR, 0x00070000)
- Name(_PRW, Package() {0x18, 4})
- Method(_PRT,0) {
- If(PICM){ Return(APS7) } /* APIC mode */
- Return (PS7) /* PIC Mode */
- } /* end _PRT */
- } /* end PBR7 */
-
- Device(PE20) {
- Name(_ADR, 0x00150000)
- Name(_PRW, Package() {0x18, 4})
- Method(_PRT,0) {
- If(PICM){ Return(APE0) } /* APIC mode */
- Return (PE0) /* PIC Mode */
- } /* end _PRT */
- } /* end PE20 */
- Device(PE21) {
- Name(_ADR, 0x00150001)
- Name(_PRW, Package() {0x18, 4})
- Method(_PRT,0) {
- If(PICM){ Return(APE1) } /* APIC mode */
- Return (PE1) /* PIC Mode */
- } /* end _PRT */
- } /* end PE21 */
- Device(PE22) {
- Name(_ADR, 0x00150002)
- Name(_PRW, Package() {0x18, 4})
- Method(_PRT,0) {
- If(PICM){ Return(APE2) } /* APIC mode */
- Return (APE2) /* PIC Mode */
- } /* end _PRT */
- } /* end PE22 */
- Device(PE23) {
- Name(_ADR, 0x00150003)
- Name(_PRW, Package() {0x18, 4})
- Method(_PRT,0) {
- If(PICM){ Return(APE3) } /* APIC mode */
- Return (PE3) /* PIC Mode */
- } /* end _PRT */
- } /* end PE23 */
/* Describe the Southbridge devices */