diff options
| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2021-10-13 17:14:51 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-14 23:58:44 +0000 |
| commit | 7af90247be608ddb79b689e0bfded3caf1c11d07 (patch) | |
| tree | d42521ab53f56f1b64f1a5a69a539fe2409f1edd /src/mainboard | |
| parent | ba358a70d7d4cb2737f6bfc7df46b49010269b54 (diff) | |
mb/google/guybrush: Fix variant_has_pcie_wwan helper
variant_has_pcie_wwan helper returns true if gpp_bridge_2 PCIe engine is
enabled. On some variants, this engine is used by storage controllers.
Fix it by adding a weak override that returns no PCIe WWAN by default.
BUG=None
TEST=Build and boot to OS in Guybrush. Ensure that PCIe WWAN is
enumerated on boards where it is stuffed.
Change-Id: I07b9dd8fc5c8c3e1557f9268c1176d4a3cade1af
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58311
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/mainboard')
3 files changed, 16 insertions, 5 deletions
diff --git a/src/mainboard/google/guybrush/variants/baseboard/helpers.c b/src/mainboard/google/guybrush/variants/baseboard/helpers.c index 881c556f70..248e7a98ab 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/helpers.c +++ b/src/mainboard/google/guybrush/variants/baseboard/helpers.c @@ -2,9 +2,6 @@ #include <baseboard/variants.h> #include <device/device.h> -#include <fw_config.h> -#include <soc/iomap.h> -#include <soc/pci_devs.h> WEAK_DEV_PTR(fpmcu); @@ -13,7 +10,7 @@ bool variant_has_fpmcu(void) return is_dev_enabled(DEV_PTR(fpmcu)); } -bool variant_has_pcie_wwan(void) +bool __weak variant_has_pcie_wwan(void) { - return is_dev_enabled(DEV_PTR(gpp_bridge_2)); + return false; } diff --git a/src/mainboard/google/guybrush/variants/guybrush/Makefile.inc b/src/mainboard/google/guybrush/variants/guybrush/Makefile.inc index f7c97bafbf..d8a1beaf8f 100644 --- a/src/mainboard/google/guybrush/variants/guybrush/Makefile.inc +++ b/src/mainboard/google/guybrush/variants/guybrush/Makefile.inc @@ -1,7 +1,12 @@ # SPDX-License-Identifier: GPL-2.0-or-later bootblock-y += gpio.c +bootblock-y += variant.c + romstage-y += gpio.c +romstage-y += variant.c + ramstage-y += gpio.c +ramstage-y += variant.c subdirs-y += ./memory diff --git a/src/mainboard/google/guybrush/variants/guybrush/variant.c b/src/mainboard/google/guybrush/variants/guybrush/variant.c new file mode 100644 index 0000000000..cde24cb9c0 --- /dev/null +++ b/src/mainboard/google/guybrush/variants/guybrush/variant.c @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/variants.h> +#include <device/device.h> + +bool variant_has_pcie_wwan(void) +{ + return is_dev_enabled(DEV_PTR(gpp_bridge_2)); +} |