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authorAnil Kumar <anil.kumar.k@intel.com>2023-10-19 10:46:57 -0700
committerLean Sheng Tan <sheng.tan@9elements.com>2023-10-27 06:38:50 +0000
commit66fb5181e38ca04a8eafca1d2abcaec8bfbecde1 (patch)
tree667ef868d4bcd678c5ad197623357985d9c80982 /src/mainboard
parentd81d80c554a2549720ce2114a1a84720d0605192 (diff)
mb/google/rex: Update FMD to support CBFS verification
This patch adds the required FMD changes to support the change in cse_lite 'commit Ie0266e50463926b8d377825 ("remove cbfs_unverified_area_map() API in cse_lite")' for CBFS verification. These blobs were kept separate originally to avoid hash loading and verification every time and hence save boot time. With the change in cse_lite the ME_RW_A/B blobs are now part of FW_MAIN_A/B and corresponding entries in FMD can be removed. BUG=b:284382452 TEST=Build CB image for google/rex board and test CSE FW update/downgrade with CONFIG_VBOOT_CBFS_INTEGRATION config enabled. Also confirm there is no increase in boot time with this change. Signed-off-by: Anil Kumar <anil.kumar.k@intel.com> Change-Id: I56865a9e5c8b5f9e908e00e1a7e7e187d5d6a2f5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/78487 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com> Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/rex/chromeos-debug-fsp.fmd2
-rw-r--r--src/mainboard/google/rex/chromeos.fmd2
-rw-r--r--src/mainboard/google/rex/chromeos4es-debug-fsp.fmd10
-rw-r--r--src/mainboard/google/rex/chromeos4es.fmd10
4 files changed, 0 insertions, 24 deletions
diff --git a/src/mainboard/google/rex/chromeos-debug-fsp.fmd b/src/mainboard/google/rex/chromeos-debug-fsp.fmd
index 37785fd92d..89d1d589f0 100644
--- a/src/mainboard/google/rex/chromeos-debug-fsp.fmd
+++ b/src/mainboard/google/rex/chromeos-debug-fsp.fmd
@@ -8,7 +8,6 @@ FLASH 32M {
VBLOCK_A 8K
FW_MAIN_A(CBFS)
RW_FWID_A 64
- ME_RW_A(CBFS) 4000K
}
RW_MISC 1M {
UNIFIED_MRC_CACHE(PRESERVE) 128K {
@@ -36,7 +35,6 @@ FLASH 32M {
VBLOCK_B 8K
FW_MAIN_B(CBFS)
RW_FWID_B 64
- ME_RW_B(CBFS) 4000K
}
RW_LEGACY(CBFS) 1M
RW_UNUSED 3M
diff --git a/src/mainboard/google/rex/chromeos.fmd b/src/mainboard/google/rex/chromeos.fmd
index 63195531a7..c104cdedb7 100644
--- a/src/mainboard/google/rex/chromeos.fmd
+++ b/src/mainboard/google/rex/chromeos.fmd
@@ -8,7 +8,6 @@ FLASH 32M {
VBLOCK_A 8K
FW_MAIN_A(CBFS)
RW_FWID_A 64
- ME_RW_A(CBFS) 4000K
}
RW_MISC 1M {
UNIFIED_MRC_CACHE(PRESERVE) 128K {
@@ -36,7 +35,6 @@ FLASH 32M {
VBLOCK_B 8K
FW_MAIN_B(CBFS)
RW_FWID_B 64
- ME_RW_B(CBFS) 4000K
}
RW_LEGACY(CBFS) 1M
RW_UNUSED 4M
diff --git a/src/mainboard/google/rex/chromeos4es-debug-fsp.fmd b/src/mainboard/google/rex/chromeos4es-debug-fsp.fmd
index 3fbee83a35..c9e5984202 100644
--- a/src/mainboard/google/rex/chromeos4es-debug-fsp.fmd
+++ b/src/mainboard/google/rex/chromeos4es-debug-fsp.fmd
@@ -8,11 +8,6 @@ FLASH 32M {
VBLOCK_A 8K
FW_MAIN_A(CBFS)
RW_FWID_A 64
-#if CONFIG_BOARD_GOOGLE_MODEL_REX_EC_ISH
- ME_RW_A(CBFS) 4500K
-#else
- ME_RW_A(CBFS) 4400K
-#endif
}
# This section starts at the 16M boundary in SPI flash.
# MTL does not support a region crossing this boundary,
@@ -22,11 +17,6 @@ FLASH 32M {
VBLOCK_B 8K
FW_MAIN_B(CBFS)
RW_FWID_B 64
-#if CONFIG_BOARD_GOOGLE_MODEL_REX_EC_ISH
- ME_RW_B(CBFS) 4500K
-#else
- ME_RW_B(CBFS) 4400K
-#endif
}
RW_MISC 1M {
UNIFIED_MRC_CACHE(PRESERVE) 128K {
diff --git a/src/mainboard/google/rex/chromeos4es.fmd b/src/mainboard/google/rex/chromeos4es.fmd
index 113bc7213e..d7d882d461 100644
--- a/src/mainboard/google/rex/chromeos4es.fmd
+++ b/src/mainboard/google/rex/chromeos4es.fmd
@@ -8,11 +8,6 @@ FLASH 32M {
VBLOCK_A 8K
FW_MAIN_A(CBFS)
RW_FWID_A 64
-#if CONFIG_BOARD_GOOGLE_MODEL_REX_EC_ISH
- ME_RW_A(CBFS) 4500K
-#else
- ME_RW_A(CBFS) 4400K
-#endif
}
# This section starts at the 16M boundary in SPI flash.
# MTL does not support a region crossing this boundary,
@@ -22,11 +17,6 @@ FLASH 32M {
VBLOCK_B 8K
FW_MAIN_B(CBFS)
RW_FWID_B 64
-#if CONFIG_BOARD_GOOGLE_MODEL_REX_EC_ISH
- ME_RW_B(CBFS) 4500K
-#else
- ME_RW_B(CBFS) 4400K
-#endif
}
RW_MISC 1M {
UNIFIED_MRC_CACHE(PRESERVE) 128K {