src, util: Clean up makefile.inc in text, help & comments

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Ib69236fb5d68272f92405512dc231fa75ecccaa6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80125
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

9 files changed, 9 insertions, 9 deletions

diff --git a/src/mainboard/cavium/cn8100_sff_evb/board.fmd b/src/mainboard/cavium/cn8100_sff_evb/board.fmd
index 34f3161b8f..011d0701aa 100644
--- a/src/mainboard/cavium/cn8100_sff_evb/board.fmd
+++ b/src/mainboard/cavium/cn8100_sff_evb/board.fmd
@@ -6,7 +6,7 @@ FLASH@0x0 8M {
 			FMAP@0x0 0x1000
 			# bootblock includes trusted/non-trusted CLIB, CSIB,
 			# and BL1FWs packaged in
-			# src/soc/cavium/common/Makefile.inc.
+			# src/soc/cavium/common/Makefile.mk.
 			BOOTBLOCK@0x10000 0x70000
 			COREBOOT(CBFS)@0x80000 0x77c000
 		}
diff --git a/src/mainboard/google/glados/variants/asuka/variant.c b/src/mainboard/google/glados/variants/asuka/variant.c
index 68392fe973..2dca9b06b4 100644
--- a/src/mainboard/google/glados/variants/asuka/variant.c
+++ b/src/mainboard/google/glados/variants/asuka/variant.c
@@ -38,6 +38,6 @@ void variant_memory_init_params(FSPM_UPD *mupd, const int spd_index)
 
 int is_dual_channel(const int spd_index)
 {
-	/* Per Makefile.inc, dual channel indices 1,3,5 */
+	/* Per Makefile.mk, dual channel indices 1,3,5 */
 	return (spd_index & 0x1);
 }
diff --git a/src/mainboard/google/nyan_big/bct/Makefile.mk b/src/mainboard/google/nyan_big/bct/Makefile.mk
index f83c93263d..9f656470f0 100644
--- a/src/mainboard/google/nyan_big/bct/Makefile.mk
+++ b/src/mainboard/google/nyan_big/bct/Makefile.mk
@@ -5,5 +5,5 @@ bct-cfg-$(CONFIG_NYAN_BIG_BCT_CFG_SPI) += spi.cfg
 bct-cfg-y += odmdata.cfg
 
 # Note when SDRAM config (sdram-*.cfg) files are changed, we have to regenerate
-# the include files (sdram-*.inc). See ../../nyan/bct/Makefile.inc for more
+# the include files (sdram-*.inc). See ../../nyan/bct/Makefile.mk for more
 # information.
diff --git a/src/mainboard/google/nyan_blaze/bct/Makefile.mk b/src/mainboard/google/nyan_blaze/bct/Makefile.mk
index 02f32a59bd..86fcfc449f 100644
--- a/src/mainboard/google/nyan_blaze/bct/Makefile.mk
+++ b/src/mainboard/google/nyan_blaze/bct/Makefile.mk
@@ -5,5 +5,5 @@ bct-cfg-$(CONFIG_NYAN_BLAZE_BCT_CFG_SPI) += spi.cfg
 bct-cfg-y += odmdata.cfg
 
 # Note when SDRAM config (sdram-*.cfg) files are changed, we have to regenerate
-# the include files (sdram-*.inc). See ../../nyan/bct/Makefile.inc for more
+# the include files (sdram-*.inc). See ../../nyan/bct/Makefile.mk for more
 # information.
diff --git a/src/mainboard/intel/strago/Kconfig b/src/mainboard/intel/strago/Kconfig
index 5cd7880167..ce56cc608b 100644
--- a/src/mainboard/intel/strago/Kconfig
+++ b/src/mainboard/intel/strago/Kconfig
@@ -35,7 +35,7 @@ config VGA_BIOS_ID
 	default "8086,22b0"
 	help
 	  The VGA_BIOS_ID for the C0 version of the video BIOS is hardcoded
-	  in soc/intel/braswell/Makefile.inc as 8086,22b1
+	  in soc/intel/braswell/Makefile.mk as 8086,22b1
 
 config CBFS_SIZE
 	default 0x200000
diff --git a/src/mainboard/opencellular/elgon/board.fmd b/src/mainboard/opencellular/elgon/board.fmd
index 784f3b06f7..222490c0e3 100644
--- a/src/mainboard/opencellular/elgon/board.fmd
+++ b/src/mainboard/opencellular/elgon/board.fmd
@@ -6,7 +6,7 @@ FLASH@0x0 16M {
 			FMAP@0x0 0x1000
 			# bootblock includes trusted/non-trusted CLIB, CSIB,
 			# and BL1FWs packaged in
-			# src/soc/cavium/common/Makefile.inc.
+			# src/soc/cavium/common/Makefile.mk.
 			BOOTBLOCK@0x10000 0x70000
 			COREBOOT(CBFS)@0x80000 0xf7c000
 		}
diff --git a/src/mainboard/opencellular/elgon/vboot.fmd b/src/mainboard/opencellular/elgon/vboot.fmd
index 0d6af2d12e..77ef10d046 100644
--- a/src/mainboard/opencellular/elgon/vboot.fmd
+++ b/src/mainboard/opencellular/elgon/vboot.fmd
@@ -8,7 +8,7 @@ FLASH@0x0 16M {
 			RO_FRID@0x1000 0x100
 			# bootblock includes trusted/non-trusted CLIB, CSIB,
 			# and BL1FWs packaged in
-			# src/soc/cavium/common/Makefile.inc.
+			# src/soc/cavium/common/Makefile.mk.
 			BOOTBLOCK@0x10000 0x70000
 			COREBOOT(CBFS)@0x80000 0x2fc000
 			GBB@0x37c000 0x80000
diff --git a/src/mainboard/protectli/vault_bsw/Kconfig b/src/mainboard/protectli/vault_bsw/Kconfig
index e169392d6a..63fc7101f1 100644
--- a/src/mainboard/protectli/vault_bsw/Kconfig
+++ b/src/mainboard/protectli/vault_bsw/Kconfig
@@ -57,7 +57,7 @@ config VGA_BIOS_ID
 	default "8086,22b0"
 	help
 	  The VGA_BIOS_ID for the C0 version of the video bios is hardcoded
-	  in soc/intel/braswell/Makefile.inc as 8086,22b1
+	  in soc/intel/braswell/Makefile.mk as 8086,22b1
 
 endif #RUN_FSP_GOP
 
diff --git a/src/mainboard/siemens/mc_apl1/Makefile.mk b/src/mainboard/siemens/mc_apl1/Makefile.mk
index e179201c9c..37b6c74f35 100644
--- a/src/mainboard/siemens/mc_apl1/Makefile.mk
+++ b/src/mainboard/siemens/mc_apl1/Makefile.mk
@@ -4,7 +4,7 @@ bootblock-y += bootblock.c
 
 # The inclusion of romstage.c is not necessary here.
 # It is put down only to the better understanding.
-# The file is already included over src/arch/x86/Makefile.inc.
+# The file is already included over src/arch/x86/Makefile.mk.
 romstage-y += romstage.c
 
 ramstage-y += mainboard.c