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authorMario Scheithauer <mario.scheithauer@siemens.com>2022-04-27 11:26:56 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-05-21 17:41:16 +0000
commit5b3ccc253f78996216207ae3d5f77072f7a04621 (patch)
tree5a595abd510a9dd013fd4d5919857f782bca6e2f /src/mainboard
parentdccdaceb494fdb0466a1c46b68df3642280f587f (diff)
mb/siemens/mc_ehl2: Invert PHY IRQ from falling edge to rising edge
There are three external Marvell PHY 88E1512 on this mainboard. The PHY IRQ comes with a falling edge but the EHL MAC side needs a rising edge signal. For that reason, we need an inversion of the IRQ polarity. Change-Id: Id3caf582b4434b046779f5733e6ad9b57528ce35 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63889 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
index 81f68e2314..a1c8ae3e04 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
@@ -104,6 +104,9 @@ chip soc/intel/elkhartlake
register "PchTsnGbeSgmiiEnable" = "1"
register "PseDmaOwn[0]" = "Host_Owned"
register "PseDmaOwn[1]" = "Host_Owned"
+ register "pch_tsn_phy_irq_edge" = "RISING_EDGE"
+ register "pse_tsn_phy_irq_edge[0]" = "RISING_EDGE"
+ register "pse_tsn_phy_irq_edge[1]" = "RISING_EDGE"
register "common_soc_config" = "{
.i2c[2] = {