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authorCasper Chang <casper_chang@wistron.corp-partner.google.com>2022-05-18 19:06:09 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-05-20 16:43:03 +0000
commit55c1e7f858edb939555fbf02223de3e7d020a2a6 (patch)
treebee8dda996840ac23cdb89872a6d50cdaf6589ae /src/mainboard
parentf5cd9a15bac9b691cb7563abd6b9bae8588b1bca (diff)
mb/google/brya: Disable PCH USB2 phy power gating for primus
The patch disables PCH USB2 Phy power gating to prevent possible display flicker issue for primus board. Please refer Intel doc#723158 for more information. BUG=b:221461379 TEST=Verify the build for primus board Signed-off-by: Casper Chang <casper_chang@wistron.corp-partner.google.com> Change-Id: I4d7d52bdeafe8b1b55822b5c8d040c94ce1f3878 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64463 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/brya/variants/primus/overridetree.cb4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/primus/overridetree.cb b/src/mainboard/google/brya/variants/primus/overridetree.cb
index 80a456b32c..48f8adca4b 100644
--- a/src/mainboard/google/brya/variants/primus/overridetree.cb
+++ b/src/mainboard/google/brya/variants/primus/overridetree.cb
@@ -26,6 +26,10 @@ chip soc/intel/alderlake
register "sagv" = "SaGv_Enabled"
register "max_dram_speed_mts" = "3733"
+ # As per Intel Advisory doc#723158, the change is required to prevent possible
+ # display flickering issue.
+ register "usb2_phy_sus_pg_disable" = "1"
+
# Acoustic settings
register "acoustic_noise_mitigation" = "1"
register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8"