diff options
author | Felix Singer <felixsinger@posteo.net> | 2022-03-07 04:34:52 +0100 |
---|---|---|
committer | Felix Singer <felixsinger@posteo.net> | 2022-03-07 08:32:09 +0000 |
commit | 43b7f416783ccc98952a4eb5f9274907442b03e5 (patch) | |
tree | 86a45336e809bee5d2891f2be9cf00184da9bb18 /src/mainboard | |
parent | 2c423441c054d7a8c93cc814b9db5f8f7185bd0f (diff) |
src: Make PCI ID define names shorter
Shorten define names containing PCI_{DEVICE,VENDOR}_ID_ with
PCI_{DID,VID}_ using the commands below, which also take care of some
spacing issues. An additional clean up of pci_ids.h is done in
CB:61531.
Used commands:
* find -type f -exec sed -i 's/PCI_\([DV]\)\(EVICE\|ENDOR\)_ID_\([_0-9A-Za-z]\{2\}\([_0-9A-Za-z]\{8\}\)*[_0-9A-Za-z]\{0,5\}\)\t/PCI_\1ID_\3\t\t/g'
* find -type f -exec sed -i 's/PCI_\([DV]\)\(EVICE\|ENDOR\)_ID_\([_0-9A-Za-z]*\)/PCI_\1ID_\3/g'
Change-Id: If9027700f53b6d0d3964c26a41a1f9b8f62be178
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39331
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/mainboard')
17 files changed, 64 insertions, 64 deletions
diff --git a/src/mainboard/google/brya/variants/brask/ramstage.c b/src/mainboard/google/brya/variants/brask/ramstage.c index c2a5ec3818..ee96c18d45 100644 --- a/src/mainboard/google/brya/variants/brask/ramstage.c +++ b/src/mainboard/google/brya/variants/brask/ramstage.c @@ -10,28 +10,28 @@ const struct cpu_power_limits limits[] = { /* SKU_ID, TDP (Watts), pl1_min, pl1_max, pl2_min, pl2_max, pl4 */ - { PCI_DEVICE_ID_INTEL_ADL_P_ID_10, 15, 15000, 15000, 55000, 55000, 123000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 15, 15000, 15000, 55000, 55000, 123000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_6, 15, 15000, 15000, 55000, 55000, 123000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 28, 28000, 28000, 64000, 64000, 90000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 28, 28000, 28000, 64000, 64000, 140000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 45, 45000, 45000, 95000, 95000, 125000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_4, 45, 45000, 45000, 115000, 115000, 215000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 45, 45000, 45000, 115000, 115000, 215000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_1, 45, 45000, 45000, 95000, 95000, 125000 }, + { PCI_DID_INTEL_ADL_P_ID_10, 15, 15000, 15000, 55000, 55000, 123000 }, + { PCI_DID_INTEL_ADL_P_ID_7, 15, 15000, 15000, 55000, 55000, 123000 }, + { PCI_DID_INTEL_ADL_P_ID_6, 15, 15000, 15000, 55000, 55000, 123000 }, + { PCI_DID_INTEL_ADL_P_ID_5, 28, 28000, 28000, 64000, 64000, 90000 }, + { PCI_DID_INTEL_ADL_P_ID_3, 28, 28000, 28000, 64000, 64000, 140000 }, + { PCI_DID_INTEL_ADL_P_ID_5, 45, 45000, 45000, 95000, 95000, 125000 }, + { PCI_DID_INTEL_ADL_P_ID_4, 45, 45000, 45000, 115000, 115000, 215000 }, + { PCI_DID_INTEL_ADL_P_ID_3, 45, 45000, 45000, 115000, 115000, 215000 }, + { PCI_DID_INTEL_ADL_P_ID_1, 45, 45000, 45000, 95000, 95000, 125000 }, }; const struct system_power_limits sys_limits[] = { /* SKU_ID, TDP (Watts), psys_pl2 (Watts) */ - { PCI_DEVICE_ID_INTEL_ADL_P_ID_10, 15, 135 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 15, 135 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_6, 15, 135 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 28, 230 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 28, 230 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 45, 230 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_4, 45, 230 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 45, 230 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_1, 45, 230 }, + { PCI_DID_INTEL_ADL_P_ID_10, 15, 135 }, + { PCI_DID_INTEL_ADL_P_ID_7, 15, 135 }, + { PCI_DID_INTEL_ADL_P_ID_6, 15, 135 }, + { PCI_DID_INTEL_ADL_P_ID_5, 28, 230 }, + { PCI_DID_INTEL_ADL_P_ID_3, 28, 230 }, + { PCI_DID_INTEL_ADL_P_ID_5, 45, 230 }, + { PCI_DID_INTEL_ADL_P_ID_4, 45, 230 }, + { PCI_DID_INTEL_ADL_P_ID_3, 45, 230 }, + { PCI_DID_INTEL_ADL_P_ID_1, 45, 230 }, }; /* diff --git a/src/mainboard/google/brya/variants/brya0/ramstage.c b/src/mainboard/google/brya/variants/brya0/ramstage.c index 06040e485f..970c628f50 100644 --- a/src/mainboard/google/brya/variants/brya0/ramstage.c +++ b/src/mainboard/google/brya/variants/brya0/ramstage.c @@ -6,11 +6,11 @@ const struct cpu_power_limits limits[] = { /* SKU_ID, TDP (Watts), pl1_min, pl1_max, pl2_min, pl2_max, pl4 */ /* All values are for baseline config as per bug:191906315 comment #10 */ - { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 15, 3000, 15000, 39000, 39000, 100000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_6, 15, 3000, 15000, 39000, 39000, 100000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 28, 4000, 28000, 43000, 43000, 105000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 28, 4000, 28000, 43000, 43000, 105000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 45, 5000, 45000, 80000, 80000, 159000 }, + { PCI_DID_INTEL_ADL_P_ID_7, 15, 3000, 15000, 39000, 39000, 100000 }, + { PCI_DID_INTEL_ADL_P_ID_6, 15, 3000, 15000, 39000, 39000, 100000 }, + { PCI_DID_INTEL_ADL_P_ID_5, 28, 4000, 28000, 43000, 43000, 105000 }, + { PCI_DID_INTEL_ADL_P_ID_3, 28, 4000, 28000, 43000, 43000, 105000 }, + { PCI_DID_INTEL_ADL_P_ID_3, 45, 5000, 45000, 80000, 80000, 159000 }, }; void variant_devtree_update(void) diff --git a/src/mainboard/google/brya/variants/brya4es/ramstage.c b/src/mainboard/google/brya/variants/brya4es/ramstage.c index 06040e485f..970c628f50 100644 --- a/src/mainboard/google/brya/variants/brya4es/ramstage.c +++ b/src/mainboard/google/brya/variants/brya4es/ramstage.c @@ -6,11 +6,11 @@ const struct cpu_power_limits limits[] = { /* SKU_ID, TDP (Watts), pl1_min, pl1_max, pl2_min, pl2_max, pl4 */ /* All values are for baseline config as per bug:191906315 comment #10 */ - { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 15, 3000, 15000, 39000, 39000, 100000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_6, 15, 3000, 15000, 39000, 39000, 100000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 28, 4000, 28000, 43000, 43000, 105000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 28, 4000, 28000, 43000, 43000, 105000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 45, 5000, 45000, 80000, 80000, 159000 }, + { PCI_DID_INTEL_ADL_P_ID_7, 15, 3000, 15000, 39000, 39000, 100000 }, + { PCI_DID_INTEL_ADL_P_ID_6, 15, 3000, 15000, 39000, 39000, 100000 }, + { PCI_DID_INTEL_ADL_P_ID_5, 28, 4000, 28000, 43000, 43000, 105000 }, + { PCI_DID_INTEL_ADL_P_ID_3, 28, 4000, 28000, 43000, 43000, 105000 }, + { PCI_DID_INTEL_ADL_P_ID_3, 45, 5000, 45000, 80000, 80000, 159000 }, }; void variant_devtree_update(void) diff --git a/src/mainboard/google/brya/variants/kano/ramstage.c b/src/mainboard/google/brya/variants/kano/ramstage.c index 9b26cbb0f2..9bba1df9e9 100644 --- a/src/mainboard/google/brya/variants/kano/ramstage.c +++ b/src/mainboard/google/brya/variants/kano/ramstage.c @@ -5,10 +5,10 @@ const struct cpu_power_limits limits[] = { /* SKU_ID, TDP (Watts), pl1_min, pl1_max, pl2_min, pl2_max, pl4 */ - { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 15, 12000, 15000, 40000, 40000, 105000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_6, 15, 12000, 15000, 40000, 40000, 105000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 28, 18000, 28000, 40000, 40000, 105000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 28, 18000, 28000, 40000, 40000, 105000 }, + { PCI_DID_INTEL_ADL_P_ID_7, 15, 12000, 15000, 40000, 40000, 105000 }, + { PCI_DID_INTEL_ADL_P_ID_6, 15, 12000, 15000, 40000, 40000, 105000 }, + { PCI_DID_INTEL_ADL_P_ID_5, 28, 18000, 28000, 40000, 40000, 105000 }, + { PCI_DID_INTEL_ADL_P_ID_3, 28, 18000, 28000, 40000, 40000, 105000 }, }; void variant_devtree_update(void) diff --git a/src/mainboard/google/hatch/variants/baseboard/mainboard.c b/src/mainboard/google/hatch/variants/baseboard/mainboard.c index c6c87dc647..c78ad5b154 100644 --- a/src/mainboard/google/hatch/variants/baseboard/mainboard.c +++ b/src/mainboard/google/hatch/variants/baseboard/mainboard.c @@ -113,8 +113,8 @@ static void mainboard_set_power_limits(struct soc_power_limits_config *conf) psyspl2 = SET_PSYSPL2(watts); /* Limit PL2 if the adapter is with lower capability */ - if (mch_id == PCI_DEVICE_ID_INTEL_CML_ULT || - mch_id == PCI_DEVICE_ID_INTEL_CML_ULT_6_2) + if (mch_id == PCI_DID_INTEL_CML_ULT || + mch_id == PCI_DID_INTEL_CML_ULT_6_2) pl2 = (psyspl2 > PUFF_U62_U42_PL2) ? PUFF_U62_U42_PL2 : psyspl2; else pl2 = (psyspl2 > PUFF_U22_PL2) ? PUFF_U22_PL2 : psyspl2; @@ -134,11 +134,11 @@ static void mainboard_set_power_limits(struct soc_power_limits_config *conf) */ volts_mv = BJ_VOLTS_MV; /* Use IGD ID to check if CPU is Core SKUs */ - if (igd_id != PCI_DEVICE_ID_INTEL_CML_GT1_ULT_1 && - igd_id != PCI_DEVICE_ID_INTEL_CML_GT2_ULT_5) { + if (igd_id != PCI_DID_INTEL_CML_GT1_ULT_1 && + igd_id != PCI_DID_INTEL_CML_GT2_ULT_5) { psyspl2 = PUFF_CORE_CPU_PSYSPL2; - if (mch_id == PCI_DEVICE_ID_INTEL_CML_ULT || - mch_id == PCI_DEVICE_ID_INTEL_CML_ULT_6_2) + if (mch_id == PCI_DID_INTEL_CML_ULT || + mch_id == PCI_DID_INTEL_CML_ULT_6_2) pl2 = PUFF_U62_U42_PL2; } } diff --git a/src/mainboard/google/poppy/variants/atlas/mainboard.c b/src/mainboard/google/poppy/variants/atlas/mainboard.c index ea7ee8fdc4..b439e30873 100644 --- a/src/mainboard/google/poppy/variants/atlas/mainboard.c +++ b/src/mainboard/google/poppy/variants/atlas/mainboard.c @@ -17,7 +17,7 @@ static uint32_t get_pl2(void) id = pci_read_config16(igd_dev, PCI_DEVICE_ID); /* Assume we only have KLB-Y and AML-Y SKUs */ - if (id == PCI_DEVICE_ID_INTEL_KBL_GT2_SULXM) + if (id == PCI_DID_INTEL_KBL_GT2_SULXM) return PL2_KBL; return PL2_AML; diff --git a/src/mainboard/google/poppy/variants/nocturne/mainboard.c b/src/mainboard/google/poppy/variants/nocturne/mainboard.c index 1482b3458f..eff5cf5e17 100644 --- a/src/mainboard/google/poppy/variants/nocturne/mainboard.c +++ b/src/mainboard/google/poppy/variants/nocturne/mainboard.c @@ -18,7 +18,7 @@ static uint32_t get_pl2(void) id = pci_read_config16(igd_dev, PCI_DEVICE_ID); /* Assume we only have KLB-Y and AML-Y SKUs */ - if (id == PCI_DEVICE_ID_INTEL_KBL_GT2_SULXM) + if (id == PCI_DID_INTEL_KBL_GT2_SULXM) return PL2_KBL; return PL2_AML; diff --git a/src/mainboard/intel/adlrvp/ramstage.c b/src/mainboard/intel/adlrvp/ramstage.c index 22902bd48b..d0f1fb48ea 100644 --- a/src/mainboard/intel/adlrvp/ramstage.c +++ b/src/mainboard/intel/adlrvp/ramstage.c @@ -16,11 +16,11 @@ const struct cpu_power_limits limits[] = { /* SKU_ID, TDP (Watts), pl1_min, pl1_max, pl2_min, pl2_max, PL4 */ /* PL2 values are for performance configuration */ - { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 15, 3000, 15000, 55000, 55000, 123000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_6, 15, 3000, 15000, 55000, 55000, 123000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 28, 4000, 28000, 64000, 64000, 140000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 28, 4000, 28000, 64000, 64000, 140000 }, - { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 45, 5000, 45000, 115000, 115000, 215000 }, + { PCI_DID_INTEL_ADL_P_ID_7, 15, 3000, 15000, 55000, 55000, 123000 }, + { PCI_DID_INTEL_ADL_P_ID_6, 15, 3000, 15000, 55000, 55000, 123000 }, + { PCI_DID_INTEL_ADL_P_ID_5, 28, 4000, 28000, 64000, 64000, 140000 }, + { PCI_DID_INTEL_ADL_P_ID_3, 28, 4000, 28000, 64000, 64000, 140000 }, + { PCI_DID_INTEL_ADL_P_ID_3, 45, 5000, 45000, 115000, 115000, 215000 }, }; WEAK_DEV_PTR(dptf_policy); diff --git a/src/mainboard/lenovo/x60/mainboard.c b/src/mainboard/lenovo/x60/mainboard.c index a9946b25d1..2eb0c389f4 100644 --- a/src/mainboard/lenovo/x60/mainboard.c +++ b/src/mainboard/lenovo/x60/mainboard.c @@ -48,7 +48,7 @@ static void mainboard_init(struct device *dev) } /* Set SDHCI write protect polarity "SDWPPol" */ - sdhci_dev = dev_find_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C822, 0); + sdhci_dev = dev_find_device(PCI_VID_RICOH, PCI_DID_RICOH_R5C822, 0); if (sdhci_dev) { if (pci_read_config8(sdhci_dev, 0xfa) != 0x20) { /* unlock */ diff --git a/src/mainboard/prodrive/hermes/devicetree.cb b/src/mainboard/prodrive/hermes/devicetree.cb index db573821cf..70ff564b1e 100644 --- a/src/mainboard/prodrive/hermes/devicetree.cb +++ b/src/mainboard/prodrive/hermes/devicetree.cb @@ -174,7 +174,7 @@ chip soc/intel/cannonlake device pci 19.0 hidden end chip soc/intel/common/block/uart device pci 19.2 hidden - register "devid" = "PCI_DEVICE_ID_INTEL_CNP_H_UART2" + register "devid" = "PCI_DID_INTEL_CNP_H_UART2" end # UART #2, in ACPI mode end device pci 1b.4 on # PCIe root port 21 (Slot 1) diff --git a/src/mainboard/siemens/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/mainboard.c index 24e61dcf95..269cdd0713 100644 --- a/src/mainboard/siemens/mc_apl1/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/mainboard.c @@ -217,7 +217,7 @@ static void mainboard_final(void *chip_info) /* Set Master Enable for on-board PCI device if allowed. */ if (CONFIG(PCI_ALLOW_BUS_MASTER_ANY_DEVICE)) { - dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403f, 0); + dev = dev_find_device(PCI_VID_SIEMENS, 0x403f, 0); if (dev) { pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); } diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c index 769c9f022a..c9d4b29563 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c @@ -24,7 +24,7 @@ void variant_mainboard_final(void) pcr_write16(PID_ITSS, 0x314c, 0x0321); /* Disable clock outputs 1-5 (CLKOUT) for XIO2001 PCIe to PCI Bridge. */ - dev = dev_find_device(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XIO2001, 0); + dev = dev_find_device(PCI_VID_TI, PCI_DID_TI_XIO2001, 0); if (dev) pci_write_config8(dev, 0xd8, 0x3e); diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c index 3951e336ee..430e67e171 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c @@ -12,7 +12,7 @@ void variant_mainboard_final(void) if (CONFIG(PCI_ALLOW_BUS_MASTER_ANY_DEVICE)) { /* Set Master Enable for on-board PCI device if allowed. */ - dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403e, 0); + dev = dev_find_device(PCI_VID_SIEMENS, 0x403e, 0); if (dev) { pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); } diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c index 0b05bf912f..bf87109add 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c @@ -37,7 +37,7 @@ void variant_mainboard_final(void) pcr_or32(PID_LPC, PCR_LPC_PRC, (PCR_LPC_CCE_EN | PCR_LPC_PCE_EN)); /* Set Master Enable for on-board PCI device if allowed. */ - dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403e, 0); + dev = dev_find_device(PCI_VID_SIEMENS, 0x403e, 0); if (dev) { if (CONFIG(PCI_ALLOW_BUS_MASTER_ANY_DEVICE)) pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); @@ -46,17 +46,17 @@ void variant_mainboard_final(void) * XIO2001 PCIe to PCI Bridge. */ struct device *parent = dev->bus->dev; - if (parent && parent->device == PCI_DEVICE_ID_TI_XIO2001) + if (parent && parent->device == PCI_DID_TI_XIO2001) pci_write_config8(parent, 0xd8, 0x1d); } /* Disable clock outputs 2-5 (CLKOUT) for another XIO2001 PCIe to PCI * Bridge on this mainboard. */ - dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403f, 0); + dev = dev_find_device(PCI_VID_SIEMENS, 0x403f, 0); if (dev) { struct device *parent = dev->bus->dev; - if (parent && parent->device == PCI_DEVICE_ID_TI_XIO2001) + if (parent && parent->device == PCI_DID_TI_XIO2001) pci_write_config8(parent, 0xd8, 0x3c); } diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c index f9cca156af..82b8c5bf0f 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c @@ -44,7 +44,7 @@ void variant_mainboard_final(void) pcr_rmw32(PID_MODPHY, TX_DWORD3, (0x00 << 16), (0x4a << 16)); /* Set Master Enable for on-board PCI device if allowed. */ - dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403e, 0); + dev = dev_find_device(PCI_VID_SIEMENS, 0x403e, 0); if (dev) { if (CONFIG(PCI_ALLOW_BUS_MASTER_ANY_DEVICE)) pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); @@ -52,17 +52,17 @@ void variant_mainboard_final(void) /* Disable clock outputs 0-3 (CLKOUT) for upstream XIO2001 PCIe * to PCI Bridge. */ struct device *parent = dev->bus->dev; - if (parent && parent->device == PCI_DEVICE_ID_TI_XIO2001) + if (parent && parent->device == PCI_DID_TI_XIO2001) pci_write_config8(parent, 0xd8, 0x0f); } /* Disable clock outputs 1-5 (CLKOUT) for another XIO2001 PCIe to PCI * Bridge on this mainboard. */ - dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403f, 0); + dev = dev_find_device(PCI_VID_SIEMENS, 0x403f, 0); if (dev) { struct device *parent = dev->bus->dev; - if (parent && parent->device == PCI_DEVICE_ID_TI_XIO2001) + if (parent && parent->device == PCI_DID_TI_XIO2001) pci_write_config8(parent, 0xd8, 0x3e); } } diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c index a9c1d1ba2e..e730e202c7 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c @@ -37,7 +37,7 @@ void variant_mainboard_final(void) pcr_or32(PID_LPC, PCR_LPC_PRC, (PCR_LPC_CCE_EN | PCR_LPC_PCE_EN)); /* Set Master Enable for on-board PCI device if allowed. */ - dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403e, 0); + dev = dev_find_device(PCI_VID_SIEMENS, 0x403e, 0); if (dev) { if (CONFIG(PCI_ALLOW_BUS_MASTER_ANY_DEVICE)) pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); @@ -46,17 +46,17 @@ void variant_mainboard_final(void) * XIO2001 PCIe to PCI Bridge. */ struct device *parent = dev->bus->dev; - if (parent && parent->device == PCI_DEVICE_ID_TI_XIO2001) + if (parent && parent->device == PCI_DID_TI_XIO2001) pci_write_config8(parent, 0xd8, 0x0F); } /* Disable clock outputs 2-5 (CLKOUT) for another XIO2001 PCIe to PCI * Bridge on this mainboard. */ - dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403f, 0); + dev = dev_find_device(PCI_VID_SIEMENS, 0x403f, 0); if (dev) { struct device *parent = dev->bus->dev; - if (parent && parent->device == PCI_DEVICE_ID_TI_XIO2001) + if (parent && parent->device == PCI_DID_TI_XIO2001) pci_write_config8(parent, 0xd8, 0x3c); } diff --git a/src/mainboard/siemens/mc_ehl/mainboard.c b/src/mainboard/siemens/mc_ehl/mainboard.c index 5c8f5849df..94362446fd 100644 --- a/src/mainboard/siemens/mc_ehl/mainboard.c +++ b/src/mainboard/siemens/mc_ehl/mainboard.c @@ -150,11 +150,11 @@ static void mainboard_final(void *chip_info) if (CONFIG(PCI_ALLOW_BUS_MASTER_ANY_DEVICE)) { /* Set Master Enable for on-board PCI devices if allowed. */ - dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403e, 0); + dev = dev_find_device(PCI_VID_SIEMENS, 0x403e, 0); if (dev) pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); - dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403f, 0); + dev = dev_find_device(PCI_VID_SIEMENS, 0x403f, 0); if (dev) pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); } |