sc7180: Add display hardware pipe line initialization

Add sc7180 display hardware pipeline programming support
and invoke the display initialization from soc_init.

Changes in V1:
- added display init required check.
- added edid read function using i2c communication.
- added sn65dsi86 bridge driver to init bridge.
- moved display initialization to mainboard file.

Changes in V2:
- moved diplay init sequence to mainboard file
- moved edid read function to bridge driver.
- calculated timing paramters using edid parameters.
- removed command mode config code.
- moved bridge driver to drivers/ti.
- seperated out bridge and soc code with mainboard file as interface.

Changes in V3:
- add GPIO selection at runtime based on boardid.
- add vbif register struct overlay.

Changes in V4:
- update gpio config for lazor board.

Change-Id: I7d5e3f1781c48759553243abeb3d694f76cd008e
Signed-off-by: Vinod Polimera <vpolimer@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39615
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>

2 files changed, 66 insertions, 2 deletions

diff --git a/src/mainboard/google/trogdor/board.h b/src/mainboard/google/trogdor/board.h
index bd7222fefa..39661b5f21 100644
--- a/src/mainboard/google/trogdor/board.h
+++ b/src/mainboard/google/trogdor/board.h
@@ -13,6 +13,11 @@
 #define GPIO_SD_CD_L	GPIO(69)
 #define GPIO_AMP_ENABLE	GPIO(23)
 
+/* Display specific GPIOS */
+#define GPIO_BACKLIGHT_ENABLE  GPIO(12)
+#define GPIO_EDP_BRIDGE_ENABLE (CONFIG(TROGDOR_REV0) ? GPIO(14) : GPIO(104))
+#define GPIO_EN_PP3300_DX_EDP  (CONFIG(TROGDOR_REV0) ? GPIO(106) : GPIO(30))
+
 void setup_chromeos_gpios(void);
 
 #endif /* _COREBOOT_SRC_MAINBOARD_GOOGLE_TROGDOR_BOARD_H_ */
diff --git a/src/mainboard/google/trogdor/mainboard.c b/src/mainboard/google/trogdor/mainboard.c
index 349c3064c3..57f3a3ba0f 100644
--- a/src/mainboard/google/trogdor/mainboard.c
+++ b/src/mainboard/google/trogdor/mainboard.c
@@ -1,9 +1,21 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <bootmode.h>
+#include <delay.h>
 #include <device/device.h>
+#include <device/i2c_simple.h>
+#include <drivers/ti/sn65dsi86bridge/sn65dsi86bridge.h>
+#include <soc/display/mipi_dsi.h>
+#include <soc/display/mdssreg.h>
 #include <soc/qupv3_config.h>
+#include <soc/qupv3_i2c.h>
 #include <soc/usb.h>
 
+#include "board.h"
+
+#define BRIDGE_BUS 0x2
+#define BRIDGE_CHIP 0x2d
+
 static struct usb_board_data usb0_board_data = {
 	.pll_bias_control_2 = 0x22,
 	.imp_ctrl1 = 0x08,
@@ -20,7 +32,6 @@ static void setup_usb(void)
 
 static void qi2s_configure_gpios(void)
 {
-
 	gpio_configure(GPIO(49), GPIO49_FUNC_MI2S_1_SCK,
 				GPIO_NO_PULL, GPIO_8MA, GPIO_OUTPUT);
 
@@ -34,7 +45,6 @@ static void qi2s_configure_gpios(void)
 static void load_qup_fw(void)
 {
 	qupv3_se_fw_load_and_init(QUPV3_0_SE1, SE_PROTOCOL_SPI, MIXED);  /* ESIM SPI */
-	qupv3_se_fw_load_and_init(QUPV3_0_SE2, SE_PROTOCOL_I2C, MIXED);  /* EDP Bridge I2C */
 	qupv3_se_fw_load_and_init(QUPV3_0_SE3, SE_PROTOCOL_UART, FIFO);  /* BT UART */
 	qupv3_se_fw_load_and_init(QUPV3_0_SE4, SE_PROTOCOL_I2C, MIXED);  /* Pen Detect I2C */
 	qupv3_se_fw_load_and_init(QUPV3_0_SE5, SE_PROTOCOL_I2C, MIXED);  /* SAR I2C */
@@ -51,11 +61,60 @@ static void load_qup_fw(void)
 	qupv3_se_fw_load_and_init(QUPV3_1_SE5, SE_PROTOCOL_I2C, MIXED);  /* Codec I2C */
 }
 
+static void configure_display(void)
+{
+	printk(BIOS_INFO, "%s: Bridge gpio init\n", __func__);
+
+	/* Bridge Enable GPIO */
+	gpio_output(GPIO_EDP_BRIDGE_ENABLE, 1);
+
+	/* PP3300 EDP power supply */
+	gpio_output(GPIO_EN_PP3300_DX_EDP, 1);
+}
+
+static void display_init(struct edid *edid)
+{
+	uint32_t dsi_bpp = 24;
+	uint32_t lanes = 4;
+
+	if (mdss_dsi_config(edid, lanes, dsi_bpp))
+		return;
+
+	sn65dsi86_bridge_configure(BRIDGE_BUS, BRIDGE_CHIP, edid, lanes, dsi_bpp);
+	mdp_dsi_video_config(edid);
+	mdss_dsi_video_mode_config(edid, dsi_bpp);
+	mdp_dsi_video_on();
+}
+
+static void display_startup(void)
+{
+	static struct edid ed;
+	enum dp_pll_clk_src ref_clk = SN65_SEL_19MHZ;
+
+	i2c_init(QUPV3_0_SE2, I2C_SPEED_FAST); /* EDP Bridge I2C */
+	if (display_init_required()) {
+		configure_display();
+		mdelay(250); /* Delay for the panel to be up */
+		sn65dsi86_bridge_init(BRIDGE_BUS, BRIDGE_CHIP, ref_clk);
+		if (sn65dsi86_bridge_read_edid(BRIDGE_BUS, BRIDGE_CHIP, &ed) < 0)
+			return;
+
+		printk(BIOS_INFO, "display init!\n");
+
+		/* Configure backlight */
+		gpio_output(GPIO_BACKLIGHT_ENABLE, 1);
+		display_init(&ed);
+		set_vbe_mode_info_valid(&ed, (uintptr_t)0);
+	} else
+		printk(BIOS_INFO, "Skipping display init.\n");
+}
+
 static void mainboard_init(struct device *dev)
 {
 	setup_usb();
 	qi2s_configure_gpios();
 	load_qup_fw();
+	display_startup();
 }
 
 static void mainboard_enable(struct device *dev)