summaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
authorV Sowmya <v.sowmya@intel.com>2017-07-18 16:18:18 +0530
committerMartin Roth <martinroth@google.com>2017-07-27 00:31:51 +0000
commit34e92a9be51a4f6bab2b124bac8e7ae7b7bf5728 (patch)
treeccf51f0735238da2e7215dd9906b8ca331892b93 /src/mainboard
parent0f307957b419a2099bb128f2cec35a16550e643e (diff)
mb/google/kblrvp: Configure ports and endpoints for sensor and CIO2 devices
Bind the camera sensor and CIO2 devices through the ports and endpoints configuration available in _DSD ACPI object. * Port represents an interface in a device. * Endpoint represents a connection to that interface. BUG=none BRANCH=none TEST=Build and boot kblrvp. Dump and verify that the generated DSDT table has the required entries. Change-Id: If328864dbb61586a4887c7fcae740a12eda7cc92 Signed-off-by: V Sowmya <v.sowmya@intel.com> Reviewed-on: https://review.coreboot.org/20662 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/intel/kblrvp/acpi/ipu_mainboard.asl74
-rw-r--r--src/mainboard/intel/kblrvp/acpi/mipi_camera.asl80
-rw-r--r--src/mainboard/intel/kblrvp/dsdt.asl3
3 files changed, 157 insertions, 0 deletions
diff --git a/src/mainboard/intel/kblrvp/acpi/ipu_mainboard.asl b/src/mainboard/intel/kblrvp/acpi/ipu_mainboard.asl
new file mode 100644
index 0000000000..211ca43ad6
--- /dev/null
+++ b/src/mainboard/intel/kblrvp/acpi/ipu_mainboard.asl
@@ -0,0 +1,74 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+Scope (\_SB.PCI0.CIO2)
+{
+ /* Define two ports for CIO2 device where endpoint of port0
+ is connected to CAM0 and endpoint of port1 is connected to CAM1 */
+
+ Name (_DSD, Package () {
+ ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
+ Package () {
+ Package () { "port0", "PRT0" },
+ Package () { "port1", "PRT1" },
+ }
+ })
+
+ Name (PRT0, Package () {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "port", 0 }, /* csi 0 */
+ },
+ ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
+ Package () {
+ Package () { "endpoint0", "EP00" },
+ }
+ })
+
+ Name (EP00, Package() {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "endpoint", 0 },
+ Package () { "clock-lanes", 0 },
+ Package () { "data-lanes", Package () { 1, 2, 3, 4 } },
+ Package () { "remote-endpoint",
+ Package() { \_SB.PCI0.I2C2.CAM0, 0, 0 }
+ },
+ }
+ })
+
+ Name (PRT1, Package () {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "port", 1 }, /* csi 1 */
+ },
+ ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
+ Package () {
+ Package () { "endpoint0", "EP10" },
+ }
+ })
+
+ Name (EP10, Package() {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "endpoint", 0 },
+ Package () { "clock-lanes", 0 },
+ Package () { "data-lanes", Package () { 1, 2 } },
+ Package () { "remote-endpoint",
+ Package() { \_SB.PCI0.I2C3.CAM1, 0, 0 }
+ },
+ }
+ })
+}
diff --git a/src/mainboard/intel/kblrvp/acpi/mipi_camera.asl b/src/mainboard/intel/kblrvp/acpi/mipi_camera.asl
index 3fefeb1b49..8a4450572e 100644
--- a/src/mainboard/intel/kblrvp/acpi/mipi_camera.asl
+++ b/src/mainboard/intel/kblrvp/acpi/mipi_camera.asl
@@ -57,6 +57,46 @@ Scope (\_SB.PCI0.I2C2)
)
})
+ /* Port0 of CAM0 is connected to port0 of CIO2 device */
+ Name (_DSD, Package () {
+ ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
+ Package () {
+ Package () { "port0", "PRT0" },
+ },
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "clock-frequency", 19200000 },
+ }
+ })
+
+ Name (PRT0, Package() {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "port", 0 },
+ },
+ ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
+ Package () {
+ Package () { "endpoint0", "EP00" },
+ }
+ })
+
+ Name (EP00, Package() {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "endpoint", 0 },
+ Package () { "clock-lanes", 0 },
+ Package () { "data-lanes",
+ Package () { 1, 2, 3, 4 }
+ },
+ Package () { "link-frequencies",
+ Package() { 1190400000, 640000000 }
+ },
+ Package () { "remote-endpoint",
+ Package() { \_SB.PCI0.CIO2, 0, 0 }
+ },
+ }
+ })
+
Method (SSDB, 0, Serialized)
{
Return (Buffer (0x5E)
@@ -144,6 +184,46 @@ Scope (\_SB.PCI0.I2C3)
)
})
+ /* Port0 of CAM1 is connected to port1 of CIO2 device */
+ Name (_DSD, Package () {
+ ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
+ Package () {
+ Package () { "port0", "PRT0" },
+ },
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "clock-frequency", 19200000 },
+ }
+ })
+
+ Name (PRT0, Package() {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "port", 0 },
+ },
+ ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
+ Package () {
+ Package () { "endpoint0", "EP00" },
+ }
+ })
+
+ Name (EP00, Package() {
+ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "endpoint", 0 },
+ Package () { "clock-lanes", 0 },
+ Package () { "data-lanes",
+ Package () { 1, 2 }
+ },
+ Package () { "link-frequencies",
+ Package() { 844800000 }
+ },
+ Package () { "remote-endpoint",
+ Package() { \_SB.PCI0.CIO2, 1, 0 }
+ },
+ }
+ })
+
Method (SSDB, 0, Serialized)
{
Return (Buffer (0x5E)
diff --git a/src/mainboard/intel/kblrvp/dsdt.asl b/src/mainboard/intel/kblrvp/dsdt.asl
index 76e9efd36e..953121985b 100644
--- a/src/mainboard/intel/kblrvp/dsdt.asl
+++ b/src/mainboard/intel/kblrvp/dsdt.asl
@@ -36,6 +36,8 @@ DefinitionBlock(
Scope (\_SB) {
Device (PCI0)
{
+ /* Image processing unit */
+ #include <soc/intel/skylake/acpi/ipu.asl>
#include <soc/intel/skylake/acpi/systemagent.asl>
#include <soc/intel/skylake/acpi/pch.asl>
}
@@ -45,6 +47,7 @@ DefinitionBlock(
}
/* MIPI camera */
+ #include "acpi/ipu_mainboard.asl"
#include "acpi/mipi_camera.asl"
#if IS_ENABLED(CONFIG_CHROMEOS)