diff options
| author | Jan Samek <jan.samek@siemens.com> | 2022-12-13 13:16:22 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-21 13:51:45 +0000 |
| commit | 343644006f89d201b42e9f340f9907b2eea56b5b (patch) | |
| tree | 20a10eeb5283b8588a635a759f8e3720d8e7f4e3 /src/mainboard | |
| parent | 12b2a3a477556764f6d7a7629d02b9abad3f58f0 (diff) | |
mb/siemens/mc_ehl3/devicetree.cb: Remove TSN GbE 0
Remove the PSE TSN GbE device #0 as it's unused on the board and not
visible during the PCI enumeration.
Change-Id: I4a7d0e437c4f4a12d3a07564cddeafb7c697c6d3
Signed-off-by: Jan Samek <jan.samek@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70700
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/siemens/mc_ehl/variants/mc_ehl3/devicetree.cb | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/devicetree.cb index 7281a7fa45..58b2a51fa2 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/devicetree.cb @@ -186,22 +186,6 @@ chip soc/intel/elkhartlake device pci 1c.4 on end # RP5 device pci 1d.0 off end # Intel PSE IPC (local host to PSE) - device pci 1d.1 on # Intel PSE Time-Sensitive Networking GbE 0 - # Enable external Marvell PHY 88E1512 - chip drivers/net/phy/m88e1512 - register "configure_leds" = "true" - # LED[0]: On - 1000 Mbps Link, Off - Else - register "led_0_ctrl" = "7" - # LED[1]: On - Link, Blink - Activity, Off - No Link - register "led_1_ctrl" = "1" - # INTn is routed to LED[2] pin - register "enable_int" = "true" - register "downshift_cnt" = "2" - device mdio 0 on # PHY address - ops m88e1512_ops - end - end - end device pci 1d.2 on # Intel PSE Time-Sensitive Networking GbE 1 # Enable external Marvell PHY 88E1512 chip drivers/net/phy/m88e1512 |