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authorDuncan Laurie <dlaurie@google.com>2019-03-27 19:29:14 -0700
committerDuncan Laurie <dlaurie@chromium.org>2019-03-28 19:17:53 +0000
commit242c9d9f2420ef023a816275b23ce954cd71f051 (patch)
tree3dabbc9b92e1b3ce4d78afcbc319116078724e91 /src/mainboard
parent31354676d05ac5992745d943f94d0dbc550ed95c (diff)
mb/google/sarien: Call EC romstage init function
When in romstage call into the EC init function so it can send a progress code to the EC before memory training starts. BUG=b:127875364 TEST=boot with FSP debug and ensure EC does not try to turn off the system while it is still booting. Change-Id: I5d99fb16bae250a82b652c530c13977e74c3378b Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32092 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/sarien/romstage.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/sarien/romstage.c b/src/mainboard/google/sarien/romstage.c
index 95af0bc18c..e83cd4aed4 100644
--- a/src/mainboard/google/sarien/romstage.c
+++ b/src/mainboard/google/sarien/romstage.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <ec/google/wilco/romstage.h>
#include <soc/cnl_memcfg_init.h>
#include <soc/romstage.h>
@@ -49,5 +50,7 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
.spd_smbus_address[2] = 0xa4
};
+ wilco_ec_romstage_init();
+
cannonlake_memcfg_init(&memupd->FspmConfig, &memcfg, &spd);
}