diff options
| author | Furquan Shaikh <furquan@google.com> | 2014-04-22 10:41:05 -0700 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2014-04-26 13:27:09 +0200 |
| commit | 20f25dd5c8a513ee136e9f6d8c67959591298617 (patch) | |
| tree | e42f5cfe77fb4f73d3b8eb759f5faa328997efc8 /src/mainboard | |
| parent | 817149643c27fca022cf526d6113a4aff898d511 (diff) | |
Rename coreboot_ram stage to ramstage
Rename coreboot_ram stage to ramstage. This is done in order to provide
consistency with other stage names (bootblock, romstage) and to allow any
Makefile rule generalization, required for patches to be submitted later.
Change-Id: Ib66e43b7e17b9c48b2d099670ba7e7d857673386
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: http://review.coreboot.org/5567
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/cubietech/cubieboard/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/emulation/qemu-armv7/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/google/pit/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/google/snow/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/ti/beaglebone/romstage.c | 2 |
5 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/cubietech/cubieboard/romstage.c b/src/mainboard/cubietech/cubieboard/romstage.c index 199842b317..6a32c56866 100644 --- a/src/mainboard/cubietech/cubieboard/romstage.c +++ b/src/mainboard/cubietech/cubieboard/romstage.c @@ -87,7 +87,7 @@ void main(void) a1x_set_cpu_clock(384); } - entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram"); + entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage"); printk(BIOS_INFO, "entry is 0x%p, leaving romstage.\n", entry); stage_exit(entry); diff --git a/src/mainboard/emulation/qemu-armv7/romstage.c b/src/mainboard/emulation/qemu-armv7/romstage.c index 4a16436015..00dfecd431 100644 --- a/src/mainboard/emulation/qemu-armv7/romstage.c +++ b/src/mainboard/emulation/qemu-armv7/romstage.c @@ -23,7 +23,7 @@ void main(void) console_init(); - entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram"); + entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage"); stage_exit(entry); } diff --git a/src/mainboard/google/pit/romstage.c b/src/mainboard/google/pit/romstage.c index b74c27fcee..c971d0cc90 100644 --- a/src/mainboard/google/pit/romstage.c +++ b/src/mainboard/google/pit/romstage.c @@ -274,7 +274,7 @@ void main(void) cbmem_initialize_empty(); - entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram"); + entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage"); simple_spi_test(); stage_exit(entry); } diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index d45b8613c3..3a8b5e897d 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -186,6 +186,6 @@ void main(void) cbmem_initialize_empty(); - entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram"); + entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage"); stage_exit(entry); } diff --git a/src/mainboard/ti/beaglebone/romstage.c b/src/mainboard/ti/beaglebone/romstage.c index e66a3dd29e..5dce23dbfd 100644 --- a/src/mainboard/ti/beaglebone/romstage.c +++ b/src/mainboard/ti/beaglebone/romstage.c @@ -32,7 +32,7 @@ void main(void) console_init(); printk(BIOS_INFO, "Hello from romstage.\n"); - entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram"); + entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage"); printk(BIOS_INFO, "entry is 0x%p, leaving romstage.\n", entry); stage_exit(entry); |