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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-09-06 05:35:16 +0000
committerWerner Zeh <werner.zeh@siemens.com>2017-09-06 06:51:02 +0000
commitced3a0c2491a1d736a134b81644b96dc61106d30 (patch)
treedfa6d5eae1e84fcbcb052f5598439e09f07d493f /src/mainboard
parent3fd259c91d54fbfcd45e1cfe73ddfbf2359ddd78 (diff)
Revert "soc/intel/cannonlake: Add dummy ACPI DSDT table"
This reverts commit 6c0f3c7ee1d53872851dbab636787852e3572c98. Reason for revert: Broke master builds, this was submitted out-of-order, some of the dependencies have not passed review with +2 yet. Change-Id: Ib7bcb1b98623d16e074caeca839a936d71ded709 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21414 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/intel/cannonlake_rvp/Kconfig1
-rw-r--r--src/mainboard/intel/cannonlake_rvp/acpi_tables.c0
-rw-r--r--src/mainboard/intel/cannonlake_rvp/dsdt.asl37
3 files changed, 0 insertions, 38 deletions
diff --git a/src/mainboard/intel/cannonlake_rvp/Kconfig b/src/mainboard/intel/cannonlake_rvp/Kconfig
index 9d2a5f2279..35afb07718 100644
--- a/src/mainboard/intel/cannonlake_rvp/Kconfig
+++ b/src/mainboard/intel/cannonlake_rvp/Kconfig
@@ -4,7 +4,6 @@ config BOARD_SPECIFIC_OPTIONS
def_bool y
select BOARD_ROMSIZE_KB_16384
select SOC_INTEL_CANNONLAKE
- select HAVE_ACPI_TABLES
select GENERIC_SPD_BIN
config MAINBOARD_DIR
diff --git a/src/mainboard/intel/cannonlake_rvp/acpi_tables.c b/src/mainboard/intel/cannonlake_rvp/acpi_tables.c
deleted file mode 100644
index e69de29bb2..0000000000
--- a/src/mainboard/intel/cannonlake_rvp/acpi_tables.c
+++ /dev/null
diff --git a/src/mainboard/intel/cannonlake_rvp/dsdt.asl b/src/mainboard/intel/cannonlake_rvp/dsdt.asl
deleted file mode 100644
index 410e1aca6c..0000000000
--- a/src/mainboard/intel/cannonlake_rvp/dsdt.asl
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2015 Google Inc.
- * Copyright (C) 2017 Intel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-DefinitionBlock(
- "dsdt.aml",
- "DSDT",
- 0x05, // DSDT revision: ACPI v5.0
- "COREv4", // OEM id
- "COREBOOT", // OEM table id
- 0x20110725 // OEM revision
-)
-{
- // global NVS and variables
- #include <soc/intel/cannonlake/acpi/globalnvs.asl>
-
- Scope (\_SB) {
- }
-
-#if IS_ENABLED(CONFIG_CHROMEOS)
- // Chrome OS specific
- #include <vendorcode/google/chromeos/acpi/chromeos.asl>
-#endif
-}