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authorRudolf Marek <r.marek@assembler.cz>2010-12-13 20:43:33 +0000
committerRudolf Marek <r.marek@assembler.cz>2010-12-13 20:43:33 +0000
commitcc1e6452489a5223068809edd0d8ccf05ab1f7ee (patch)
tree32535ca6119739eda469d27cb81e6c15f8adbd29 /src/mainboard
parent52ff06580d5d2f7af76370c4ab7541e2f6ef0b89 (diff)
Attached patch implements the memory speed reductions (and 2T/1T clock logic) for DDR1 memory (939 sockets). The details can be found in BKDG chapter 4.1.3.3.
The patch looks at certain DDR configurations (dual rank/single rank) and lowers the clocks to 2T or frequency as guide suggest. It sets the DualDIMMen bit which I believe should be set for non-dual channel configs. The patch does not implement support for three dimm configurations supported from revE. On the other hand it should improve greatly memory stability across the 939 platform. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6176 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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