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authorRonald G. Minnich <rminnich@google.com>2013-06-26 10:29:02 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-12-12 22:02:57 +0100
commitc55131cdbf2481b4e580dc3859dc682844617a42 (patch)
tree54ff19f056ce930225e455f991f5532f97d925f3 /src/mainboard
parentdcaaba44b62ebec7fa3d490f5dbf35931360cfa1 (diff)
PIT: remove a comment that is incorrect.
The is_resume comment is wrong for this board. It only applies to the older 5250 cpu. In fact, the is_resume parameter is not needed for ddr init and will likely be removed soon. Change-Id: I4e3c92fcaaa75d3c9223d90acccf053f61406307 Signed-off-by: Ronald G. Minnich <rminnich@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/60103 Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Queue: Ronald G. Minnich <rminnich@chromium.org> Tested-by: Ronald G. Minnich <rminnich@chromium.org> Reviewed-on: http://review.coreboot.org/4342 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/pit/romstage.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/src/mainboard/google/pit/romstage.c b/src/mainboard/google/pit/romstage.c
index a757615fe4..765ff82fa4 100644
--- a/src/mainboard/google/pit/romstage.c
+++ b/src/mainboard/google/pit/romstage.c
@@ -158,13 +158,6 @@ static void setup_memory(struct mem_timings *mem, int is_resume)
mem->mpll_mdiv,
mem->frequency_mhz);
- /* FIXME Currently memory initialization with mem_reset on normal boot
- * will cause resume to fail (even if we don't do mem_reset on resume),
- * and the workaround is to temporarily always enable "is_resume".
- * This should be removed when the root cause of resume issue is found.
- */
- is_resume = 1;
-
if (ddr3_mem_ctrl_init(mem, DMC_INTERLEAVE_SIZE, !is_resume)) {
die("Failed to initialize memory controller.\n");
}