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authorRob Barnes <robbarnes@google.com>2020-10-20 11:12:47 -0600
committerFelix Held <felix-coreboot@felixheld.de>2020-10-23 16:26:00 +0000
commita10229269a2800403df589e2f7840e52eee589a4 (patch)
tree7cd21440968f24258bc5db82014388e654c9abfc /src/mainboard
parenteef5cadca8b656ddd745f74557c1c7b62a144688 (diff)
mb/google/zork/woomax: Adjust disconnect threshold
The disconnect voltage needs to be adjusted up because the HS DC voltage level is 0xF. BUG=b:170879690 TEST=Servo_v4 USB hub functions BRANCH=zork Change-Id: If8662015a45c57e457b4593e55af888084842f58 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46601 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/zork/variants/woomax/overridetree.cb4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/zork/variants/woomax/overridetree.cb b/src/mainboard/google/zork/variants/woomax/overridetree.cb
index 19d66fcfbd..e9d66f9a77 100644
--- a/src/mainboard/google/zork/variants/woomax/overridetree.cb
+++ b/src/mainboard/google/zork/variants/woomax/overridetree.cb
@@ -24,7 +24,7 @@ chip soc/amd/picasso
# End : OPN Performance Configuration
#USB 2.0 strength
register "usb_2_port_tune_params[0]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,
@@ -36,7 +36,7 @@ chip soc/amd/picasso
}"
register "usb_2_port_tune_params[3]" = "{
- .com_pds_tune = 0x03,
+ .com_pds_tune = 0x07,
.sq_rx_tune = 0x3,
.tx_fsls_tune = 0x3,
.tx_pre_emp_amp_tune = 0x03,