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authorRonald G. Minnich <rminnich@gmail.com>2004-11-11 14:04:25 +0000
committerRonald G. Minnich <rminnich@gmail.com>2004-11-11 14:04:25 +0000
commit8d41ad83befa12b905bdde5fb853898c3569f0e9 (patch)
tree2400e2d1093cdae54c4fa51f427eb451367ac2bf /src/mainboard
parent029517c77a1d756ccbb196b5178ba2a1cf952c97 (diff)
in loglevel.h, if ASM_CONSOLE_LOGLEVEL is defined, don't try to set it.
Set adl855pc ROM_SIZE to 1M Other minor debug prints until we get this fixed. We're almost as far along as we were before the Change :-) git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1780 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/digitallogic/adl855pc/Options.lb6
-rw-r--r--src/mainboard/digitallogic/adl855pc/auto.c11
2 files changed, 14 insertions, 3 deletions
diff --git a/src/mainboard/digitallogic/adl855pc/Options.lb b/src/mainboard/digitallogic/adl855pc/Options.lb
index f9cd639044..9549c3def7 100644
--- a/src/mainboard/digitallogic/adl855pc/Options.lb
+++ b/src/mainboard/digitallogic/adl855pc/Options.lb
@@ -32,8 +32,12 @@ uses CC
uses HOSTCC
uses OBJCOPY
+uses DEFAULT_CONSOLE_LOGLEVEL
+uses MAXIMUM_CONSOLE_LOGLEVEL
+default DEFAULT_CONSOLE_LOGLEVEL=9
+default MAXIMUM_CONSOLE_LOGLEVEL=9
## ROM_SIZE is the size of boot ROM that this board will use.
-default ROM_SIZE = 256*1024
+default ROM_SIZE = 1024*1024
###
### Build options
diff --git a/src/mainboard/digitallogic/adl855pc/auto.c b/src/mainboard/digitallogic/adl855pc/auto.c
index 1af77f4504..087f3da5cc 100644
--- a/src/mainboard/digitallogic/adl855pc/auto.c
+++ b/src/mainboard/digitallogic/adl855pc/auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-
+#define ASM_CONSOLE_LOGLEVEL 10
#include <stdint.h>
#include <device/pci_def.h>
#include <arch/io.h>
@@ -80,22 +80,29 @@ static void main(unsigned long bist)
w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE);
uart_init();
console_init();
+ print_err("HARD MAIN0\n");
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
-#if 0
+ print_err("HARD MAIN\n");
+#if 1
print_pci_devices();
#endif
+ print_err("after print pci dev \n");
if(!bios_reset_detected()) {
enable_smbus();
+ print_err("after enable smbus\n");
#if 1
dump_spd_registers(&memctrl[0]);
// dump_smbus_registers();
#endif
+ print_err("after dump spd registers\n");
memreset_setup();
+ print_err("memreset setup\n");
sdram_initialize(sizeof(memctrl)/sizeof(memctrl[0]), memctrl);
+ print_err("sdram init\n");
}
#if 0
else {