diff options
| author | Nico Huber <nico.h@gmx.de> | 2019-08-05 19:33:09 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-08-09 09:35:22 +0000 |
| commit | 733c28fa4228b1ce000d39e2807ebc3224302a7a (patch) | |
| tree | cbb381e0d0da8387842f611ae9a751fc7dea06e7 /src/mainboard | |
| parent | 04ce8fe6e3452ece3182dcc4404b532a8754dcfe (diff) | |
soc/intel/{cnl,icl}: Use new power-failure-state API
pmc_soc_restore_power_failure() is only called from SMM, so add
`pmc.c` to the `smm` class. Once all platforms moved to the new
API, it can be implemented in a central place, avoiding the weak-
function trap.
Change-Id: Ib13eac00002232d4377f683ad92b04a0907529f3
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34726
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/sarien/chromeos.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mainboard/google/sarien/chromeos.c b/src/mainboard/google/sarien/chromeos.c index 8f940ea0a9..6643d9b55d 100644 --- a/src/mainboard/google/sarien/chromeos.c +++ b/src/mainboard/google/sarien/chromeos.c @@ -22,8 +22,6 @@ #include <security/tpm/tss.h> #include <device/device.h> #include <intelblocks/pmclib.h> -#include <soc/pmc.h> -#include <soc/pci_devs.h> enum rec_mode_state { REC_MODE_UNINITIALIZED, @@ -122,5 +120,5 @@ void mainboard_prepare_cr50_reset(void) { /* Ensure system powers up after CR50 reset */ if (ENV_RAMSTAGE) - pmc_set_afterg3(MAINBOARD_POWER_STATE_ON); + pmc_soc_set_afterg3_en(true); } |