exynos5: Implement support for USB 3.0 DRD PHYs/controllers

This patch adds support for the DesignWare3 USB 3.0 DRD controller and
PHY to the Exynos5250 and Exynos5420 CPUs. It also adds code to the
Google Snow and Pit boards to turn these controllers on where
applicable.

Change-Id: Idcca627363a69f1d65402e1acb9a62b439f077ff
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/169452
Reviewed-by: Stefan Reinauer <reinauer@google.com>
(cherry picked from commit e9809ae12ef8b8bd6cd61d3f604cb9e4718cf7eb)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6642
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

2 files changed, 27 insertions, 3 deletions

diff --git a/src/mainboard/google/pit/mainboard.c b/src/mainboard/google/pit/mainboard.c
index bdf2d571b2..211160d754 100644
--- a/src/mainboard/google/pit/mainboard.c
+++ b/src/mainboard/google/pit/mainboard.c
@@ -312,9 +312,22 @@ static enum exynos5_gpio_pin usb_drd0_vbus = GPIO_H00;
 static enum exynos5_gpio_pin usb_drd1_vbus = GPIO_H01;
 /* static enum exynos5_gpio_pin hsic_reset_l = GPIO_X24; */
 
+static void prepare_usb(void)
+{
+	/* Kick these resets off early so they get at least 100ms to settle */
+	reset_usb_drd0_dwc3();
+	reset_usb_drd1_dwc3();
+}
+
 static void setup_usb(void)
 {
 	/* HSIC and USB HOST port not needed in firmware on this board */
+	setup_usb_drd0_phy();
+	setup_usb_drd1_phy();
+
+	setup_usb_drd0_dwc3();
+	setup_usb_drd1_dwc3();
+
 	gpio_direction_output(usb_drd0_vbus, 1);
 	gpio_direction_output(usb_drd1_vbus, 1);
 }
@@ -401,6 +414,7 @@ static void mainboard_init(device_t dev)
 
 	void *fb_addr = (void *)(get_fb_base_kb() * KiB);
 
+	prepare_usb();
 	gpio_init();
 	setup_storage();
 	tmu_init(&exynos5420_tmu_info);
@@ -408,8 +422,6 @@ static void mainboard_init(device_t dev)
 	/* Clock Gating all the unused IP's to save power */
 	clock_gate();
 
-	setup_usb();
-
 	sdmmc_vdd();
 
 	set_vbe_mode_info_valid(&edid, (uintptr_t)fb_addr);
@@ -447,6 +459,8 @@ static void mainboard_init(device_t dev)
 	backlight_vdd();
 	backlight_pwm();
 	backlight_en();
+
+	setup_usb();
 }
 
 static void mainboard_enable(device_t dev)
diff --git a/src/mainboard/google/snow/mainboard.c b/src/mainboard/google/snow/mainboard.c
index 756dc15325..f906e534a3 100644
--- a/src/mainboard/google/snow/mainboard.c
+++ b/src/mainboard/google/snow/mainboard.c
@@ -165,9 +165,17 @@ static enum exynos5_gpio_pin usb_host_vbus = GPIO_X11;
 static enum exynos5_gpio_pin usb_drd_vbus = GPIO_X27;
 /* static enum exynos5_gpio_pin hsic_reset_l = GPIO_E10; */
 
+static void prepare_usb(void)
+{
+	/* Kick this reset off early so it gets at least 100ms to settle */
+	reset_usb_drd_dwc3();
+}
+
 static void setup_usb(void)
 {
 	/* HSIC not needed in firmware on this board */
+	setup_usb_drd_phy();
+	setup_usb_drd_dwc3();
 	setup_usb_host_phy(0);
 
 	gpio_direction_output(usb_host_vbus, 1);
@@ -260,6 +268,7 @@ static void mainboard_init(device_t dev)
 	};
 	void *fb_addr = (void *)(get_fb_base_kb() * KiB);
 
+	prepare_usb();
 	gpio_init();
 	setup_storage();
 
@@ -273,7 +282,6 @@ static void mainboard_init(device_t dev)
 
 	/* Disable USB3.0 PLL to save 250mW of power */
 	disable_usb30_pll();
-	setup_usb();
 
 	sdmmc_vdd();
 
@@ -309,6 +317,8 @@ static void mainboard_init(device_t dev)
 	if (dp_tries > MAX_DP_TRIES)
 		printk(BIOS_ERR, "%s: Failed to set up displayport\n", __func__);
 
+	setup_usb();
+
 	// Uncomment to get excessive GPIO output:
 	// gpio_info();
 }