diff options
| author | Rudolf Marek <r.marek@assembler.cz> | 2008-03-15 00:26:50 +0000 |
|---|---|---|
| committer | Rudolf Marek <r.marek@assembler.cz> | 2008-03-15 00:26:50 +0000 |
| commit | 5671787b9e36ca80b39dcbbfb0307e3c697c8e20 (patch) | |
| tree | f6eeff657df63286badb6fed864d0c4e793f5ed2 /src/mainboard | |
| parent | dd52e17448b2a8b49c1add655aa3deb3adebbcbc (diff) | |
Following patch extends the ROM decoding to last 1MB, allowing to use larger
flashes such as SST49LF080A: 1024K x8 (8 Mbit)
Tested on my system, the flash is found and if I use coreboot in second half it
works too.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3148 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c b/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c index 796b87f581..58dce4dd05 100644 --- a/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c +++ b/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c @@ -192,6 +192,7 @@ void failover_process(unsigned long bist, unsigned long cpu_init_detectedx) w83627ehg_enable_serial(SERIAL_DEV, TTYS0_BASE); uart_init(); console_init(); + enable_rom_decode(); print_info("now booting... fallback\r\n"); @@ -259,6 +260,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx) w83627ehg_enable_serial(SERIAL_DEV, TTYS0_BASE); uart_init(); console_init(); + enable_rom_decode(); print_info("now booting... real_main\r\n"); |