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authorAamir Bohra <aamir.bohra@intel.com>2020-03-23 10:13:10 +0530
committerFurquan Shaikh <furquan@google.com>2020-04-01 19:12:30 +0000
commit555c9b6268febf001e887fbb9e3c3f0901a371ac (patch)
treed3b1968356086c05ac0894115f45b06cb8437e85 /src/mainboard
parenta23e0c9d74b7f06738ebf28b068e1bd63f246982 (diff)
soc/intel/tigerlake: Remove Jasper Lake SoC references
This implementation removes all JSL references from the TGL SoC code. Additionally, mainboard code changes are done to support build. BUG=b:150217037 TEST=build tglrvp and volteer Change-Id: I18853aba8b1e6ff7d37c03e8dae2521719c7c727 Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/volteer/romstage.c2
-rw-r--r--src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h2
-rw-r--r--src/mainboard/intel/tglrvp/romstage_fsp_params.c2
-rw-r--r--src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/variants.h2
4 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/volteer/romstage.c b/src/mainboard/google/volteer/romstage.c
index 5d588b2d1d..46c5fecd1e 100644
--- a/src/mainboard/google/volteer/romstage.c
+++ b/src/mainboard/google/volteer/romstage.c
@@ -8,7 +8,7 @@
#include <baseboard/variants.h>
#include <gpio.h>
#include <soc/gpio.h>
-#include <soc/meminit_tgl.h>
+#include <soc/meminit.h>
#include <soc/romstage.h>
#include <variant/gpio.h>
diff --git a/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h
index f368d886d2..d5bc63a08c 100644
--- a/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h
@@ -9,7 +9,7 @@
#define __BASEBOARD_VARIANTS_H__
#include <soc/gpio.h>
-#include <soc/meminit_tgl.h>
+#include <soc/meminit.h>
#include <stddef.h>
#include <vendorcode/google/chromeos/chromeos.h>
diff --git a/src/mainboard/intel/tglrvp/romstage_fsp_params.c b/src/mainboard/intel/tglrvp/romstage_fsp_params.c
index d636bc89c4..0af394494f 100644
--- a/src/mainboard/intel/tglrvp/romstage_fsp_params.c
+++ b/src/mainboard/intel/tglrvp/romstage_fsp_params.c
@@ -17,7 +17,7 @@
#include <soc/romstage.h>
#include <spd_bin.h>
#include <string.h>
-#include <soc/meminit_tgl.h>
+#include <soc/meminit.h>
#include <baseboard/variants.h>
#include <cbfs.h>
#include "board_id.h"
diff --git a/src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/variants.h
index 29f9a7176c..b7b69f29fd 100644
--- a/src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/variants.h
@@ -16,7 +16,7 @@
#define __BASEBOARD_VARIANTS_H__
#include <soc/gpio.h>
-#include <soc/meminit_tgl.h>
+#include <soc/meminit.h>
#include <stdint.h>
#include <vendorcode/google/chromeos/chromeos.h>