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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-03-04 07:33:56 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-08-25 20:30:20 +0000
commitd56345b77ef608ad0528445a959ef0f2097ba3e3 (patch)
treeffcabd3b9ef829e99e9309c844cdeb3d6d36630d /src/mainboard
parent5dcf5f666fdf0420409d151c3294e594d3c961c2 (diff)
gizmosphere/gizmo: Switch away from AGESA_LEGACY_WRAPPER
Change-Id: I26e2450babfde1580e0e794c519344112d4019ee Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/19148 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/gizmosphere/gizmo/Kconfig1
-rw-r--r--src/mainboard/gizmosphere/gizmo/OemCustomize.c14
2 files changed, 7 insertions, 8 deletions
diff --git a/src/mainboard/gizmosphere/gizmo/Kconfig b/src/mainboard/gizmosphere/gizmo/Kconfig
index cb272b646b..9e33c34990 100644
--- a/src/mainboard/gizmosphere/gizmo/Kconfig
+++ b/src/mainboard/gizmosphere/gizmo/Kconfig
@@ -18,7 +18,6 @@ if BOARD_GIZMOSPHERE_GIZMO
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
- select AGESA_LEGACY_WRAPPER
select CPU_AMD_AGESA_FAMILY14
select NORTHBRIDGE_AMD_AGESA_FAMILY14
select SOUTHBRIDGE_AMD_CIMX_SB800
diff --git a/src/mainboard/gizmosphere/gizmo/OemCustomize.c b/src/mainboard/gizmosphere/gizmo/OemCustomize.c
index 2184fb2c88..173f7f9991 100644
--- a/src/mainboard/gizmosphere/gizmo/OemCustomize.c
+++ b/src/mainboard/gizmosphere/gizmo/OemCustomize.c
@@ -23,7 +23,7 @@
#include "Filecode.h"
#include <string.h>
-#include <northbridge/amd/agesa/agesawrapper.h>
+#include <northbridge/amd/agesa/state_machine.h>
/*---------------------------------------------------------------------------------------*/
/**
@@ -41,7 +41,7 @@
**/
/*---------------------------------------------------------------------------------------*/
-static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly)
+void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly)
{
AGESA_STATUS Status;
VOID *BrazosPcieComplexListPtr;
@@ -137,7 +137,6 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = {
InitEarly->GnbConfig.PcieComplexList = BrazosPcieComplexListPtr;
InitEarly->GnbConfig.PsppPolicy = 0;
- return AGESA_SUCCESS;
}
/*----------------------------------------------------------------------------------------
@@ -151,7 +150,7 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = {
* is populated, AGESA will base its settings on the data from the table. Otherwise, it will
* use its default conservative settings.
*/
-CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
+static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = {
NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, TWO_DIMM),
NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, ONE_DIMM),
@@ -168,6 +167,7 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
PSO_END
};
-const struct OEM_HOOK OemCustomize = {
- .InitEarly = OemInitEarly,
-};
+void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost)
+{
+ InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)PlatformMemoryTable;
+}