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authorVincent Lim <vincent.lim@amd.com>2009-05-15 18:02:25 +0000
committerVincent Lim <vincent.lim@amd.com>2009-05-15 18:02:25 +0000
commitd12acea520840b64804ec7f2d1b9fba423ed194e (patch)
tree9daf807fd55cea594cac5f9b3e7eae57345a1661 /src/mainboard
parent99fd2a3b3ac587498b551c2c6e5d6d20f646e65b (diff)
There were a few updates lately that generates ROM size > 512K. I am changing the default ROM size to 1M to accommodate this and future changes. I tested on SimNow family10h_1p.bsd and it POSTs OK.
Signed-off-by: Vincent Lim <vincent.lim@amd.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4289 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/Options.lb8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb b/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
index 80dff3a67a..c62fbe273e 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
@@ -124,7 +124,7 @@ uses AMD_UCODE_PATCH_FILE
##
## ROM_SIZE is the size of boot ROM that this board will use.
##
-default ROM_SIZE=524288
+default ROM_SIZE=1024*1024
##
##
@@ -133,9 +133,9 @@ default ROM_SIZE=524288
#default FALLBACK_SIZE=131072
#default FALLBACK_SIZE=0x40000
-#FALLBACK: 512K - 4K
-default FALLBACK_SIZE=0x7f000
-#FAILOVER: 4k
+#FALLBACK: 1024K - 8K
+default FALLBACK_SIZE=0xFE000
+#FAILOVER: 8k
default FAILOVER_SIZE=0x02000
#more 1M for pgtbl