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authorFurquan Shaikh <furquan@google.com>2013-07-30 12:41:08 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2013-12-21 13:26:51 +0100
commitd0a81f75342508449d13fd05305864413470e0c9 (patch)
treed201c482719be707b1dbe545ac808adddcc8b340 /src/mainboard
parent10bd772db854c62528c67b9d0e5e329c525d83f9 (diff)
Calculate transcoder flags based on pipe config
Works fine with all three panels with the change of 6 bits per color. Change-Id: Ia47d152e62d1879150d8cf9a6657b62007ef5c0e Reviewed-on: https://gerrit.chromium.org/gerrit/63762 Reviewed-by: Ronald G. Minnich <rminnich@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/4402 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/slippy/gma.c12
-rw-r--r--src/mainboard/google/slippy/i915io.c2
2 files changed, 11 insertions, 3 deletions
diff --git a/src/mainboard/google/slippy/gma.c b/src/mainboard/google/slippy/gma.c
index 52a7b0b4e8..99dcbc56b6 100644
--- a/src/mainboard/google/slippy/gma.c
+++ b/src/mainboard/google/slippy/gma.c
@@ -288,6 +288,13 @@ void dp_init_dim_regs(struct intel_dp *dp)
dp->pfa_sz = (edid->ha << 16) | (edid->va);
+ dp->flags = intel_ddi_calc_transcoder_flags(3 * 6, /* bits per color is 6 */
+ dp->port,
+ dp->pipe,
+ dp->type,
+ dp->lane_count,
+ dp->pfa_sz);
+
intel_dp_compute_m_n(dp->bpp,
dp->lane_count,
dp->edid.pixel_clock,
@@ -310,6 +317,7 @@ void dp_init_dim_regs(struct intel_dp *dp)
printk(BIOS_SPEW, "0x6f030 = 0x%08x\n", TU_SIZE(dp->m_n.tu) | dp->m_n.gmch_m);
printk(BIOS_SPEW, "0x6f030 = 0x%08x\n", dp->m_n.gmch_m);
printk(BIOS_SPEW, "0x6f034 = 0x%08x\n", dp->m_n.gmch_n);
+ printk(BIOS_SPEW, "dp->flags = 0x%08x\n", dp->flags);
}
int intel_dp_bw_code_to_link_rate(u8 link_bw);
@@ -363,8 +371,8 @@ int i915lightup(unsigned int pphysbase, unsigned int piobase,
dp->panel_power_down_delay = 600;
dp->panel_power_up_delay = 200;
dp->panel_power_cycle_delay = 600;
- dp->pipe = 0;
- dp->port = 0;
+ dp->pipe = PIPE_A;
+ dp->port = PORT_A;
dp->clock = 160000;
dp->bpp = 32;
dp->type = INTEL_OUTPUT_EDP;
diff --git a/src/mainboard/google/slippy/i915io.c b/src/mainboard/google/slippy/i915io.c
index c1e05472c9..e3f7f301cf 100644
--- a/src/mainboard/google/slippy/i915io.c
+++ b/src/mainboard/google/slippy/i915io.c
@@ -151,7 +151,7 @@ printk(BIOS_SPEW, "DP_MAX_DOWNSPREAD");
io_i915_write32(0x00230000,TRANS_DDI_FUNC_CTL_EDP);
io_i915_write32(0x00000010,0x7f008);
- io_i915_write32(0x82234000,TRANS_DDI_FUNC_CTL_EDP);
+ io_i915_write32(dp->flags,TRANS_DDI_FUNC_CTL_EDP);
io_i915_write32(0x80000010,0x7f008);
intel_dp_wait_panel_power_control(0xabcd000a);