diff options
author | huang lin <hl@rock-chips.com> | 2015-01-21 09:49:16 +0800 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-04-15 22:09:01 +0200 |
commit | 29bd9e2c74b7d4c381cae240d561bad291a67c71 (patch) | |
tree | fa69528a67935d255d2a8b41aca1a3db521a396e /src/mainboard | |
parent | c9286ed20eddc220f57c014d8031b8ac6ddc31a6 (diff) |
google/veyron_*: Remove unused sdram-ddr-hynix-2GB.inc
BRANCH=None
TEST=Build speedy, pinky, mighty
BUG=None
Change-Id: If561872274bcdc2652c2bfe80cf5bd0501ad6b64
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: e6be62b4e64b13e285eb0480fdc65d814c6dadc0
Original-Change-Id: I7c97d54f3a4c94f7e23d3e85b808cd64b1cacec7
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/241939
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9651
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard')
4 files changed, 0 insertions, 308 deletions
diff --git a/src/mainboard/google/veyron_brain/sdram_inf/sdram-ddr3-hynix-2GB.inc b/src/mainboard/google/veyron_brain/sdram_inf/sdram-ddr3-hynix-2GB.inc deleted file mode 100644 index 07161c0dfa..0000000000 --- a/src/mainboard/google/veyron_brain/sdram_inf/sdram-ddr3-hynix-2GB.inc +++ /dev/null @@ -1,77 +0,0 @@ -{ - { - { - .rank = 0x1, - .col = 0xA, - .bk = 0x3, - .bw = 0x2, - .dbw = 0x1, - .row_3_4 = 0x0, - .cs0_row = 0xF, - .cs1_row = 0xF - }, - { - .rank = 0x1, - .col = 0xA, - .bk = 0x3, - .bw = 0x2, - .dbw = 0x1, - .row_3_4 = 0x0, - .cs0_row = 0xF, - .cs1_row = 0xF - } - }, - { - .togcnt1u = 0x215, - .tinit = 0xC8, - .trsth = 0x1F4, - .togcnt100n = 0x35, - .trefi = 0x4E, - .tmrd = 0x4, - .trfc = 0xBB, - .trp = 0x8, - .trtw = 0x4, - .tal = 0x0, - .tcl = 0x8, - .tcwl = 0x6, - .tras = 0x14, - .trc = 0x1D, - .trcd = 0x8, - .trrd = 0x6, - .trtp = 0x4, - .twr = 0x8, - .twtr = 0x4, - .texsr = 0x200, - .txp = 0x4, - .txpdll = 0xD, - .tzqcs = 0x40, - .tzqcsi = 0x0, - .tdqs = 0x1, - .tcksre = 0x6, - .tcksrx = 0x6, - .tcke = 0x4, - .tmod = 0xC, - .trstl = 0x36, - .tzqcl = 0x100, - .tmrr = 0x0, - .tckesr = 0x5, - .tdpd = 0x0 - }, - { - .dtpr0 = 0x3AD48890, - .dtpr1 = 0xBB08D8, - .dtpr2 = 0x1002B600, - .mr[0] = 0x840, - .mr[1] = 0x40, - .mr[2] = 0x8, - .mr[3] = 0x0 - }, - .noc_timing = 0x2891E41D, - .noc_activate = 0x5B6, - .ddrconfig = 3, - .ddr_freq = 533*MHz, - .dramtype = DDR3, - .num_channels = 2, - .stride = 9, - .odt = 1 -}, diff --git a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-hynix-2GB.inc b/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-hynix-2GB.inc deleted file mode 100644 index 07161c0dfa..0000000000 --- a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-hynix-2GB.inc +++ /dev/null @@ -1,77 +0,0 @@ -{ - { - { - .rank = 0x1, - .col = 0xA, - .bk = 0x3, - .bw = 0x2, - .dbw = 0x1, - .row_3_4 = 0x0, - .cs0_row = 0xF, - .cs1_row = 0xF - }, - { - .rank = 0x1, - .col = 0xA, - .bk = 0x3, - .bw = 0x2, - .dbw = 0x1, - .row_3_4 = 0x0, - .cs0_row = 0xF, - .cs1_row = 0xF - } - }, - { - .togcnt1u = 0x215, - .tinit = 0xC8, - .trsth = 0x1F4, - .togcnt100n = 0x35, - .trefi = 0x4E, - .tmrd = 0x4, - .trfc = 0xBB, - .trp = 0x8, - .trtw = 0x4, - .tal = 0x0, - .tcl = 0x8, - .tcwl = 0x6, - .tras = 0x14, - .trc = 0x1D, - .trcd = 0x8, - .trrd = 0x6, - .trtp = 0x4, - .twr = 0x8, - .twtr = 0x4, - .texsr = 0x200, - .txp = 0x4, - .txpdll = 0xD, - .tzqcs = 0x40, - .tzqcsi = 0x0, - .tdqs = 0x1, - .tcksre = 0x6, - .tcksrx = 0x6, - .tcke = 0x4, - .tmod = 0xC, - .trstl = 0x36, - .tzqcl = 0x100, - .tmrr = 0x0, - .tckesr = 0x5, - .tdpd = 0x0 - }, - { - .dtpr0 = 0x3AD48890, - .dtpr1 = 0xBB08D8, - .dtpr2 = 0x1002B600, - .mr[0] = 0x840, - .mr[1] = 0x40, - .mr[2] = 0x8, - .mr[3] = 0x0 - }, - .noc_timing = 0x2891E41D, - .noc_activate = 0x5B6, - .ddrconfig = 3, - .ddr_freq = 533*MHz, - .dramtype = DDR3, - .num_channels = 2, - .stride = 9, - .odt = 1 -}, diff --git a/src/mainboard/google/veyron_pinky/sdram_inf/sdram-ddr3-hynix-2GB.inc b/src/mainboard/google/veyron_pinky/sdram_inf/sdram-ddr3-hynix-2GB.inc deleted file mode 100644 index 07161c0dfa..0000000000 --- a/src/mainboard/google/veyron_pinky/sdram_inf/sdram-ddr3-hynix-2GB.inc +++ /dev/null @@ -1,77 +0,0 @@ -{ - { - { - .rank = 0x1, - .col = 0xA, - .bk = 0x3, - .bw = 0x2, - .dbw = 0x1, - .row_3_4 = 0x0, - .cs0_row = 0xF, - .cs1_row = 0xF - }, - { - .rank = 0x1, - .col = 0xA, - .bk = 0x3, - .bw = 0x2, - .dbw = 0x1, - .row_3_4 = 0x0, - .cs0_row = 0xF, - .cs1_row = 0xF - } - }, - { - .togcnt1u = 0x215, - .tinit = 0xC8, - .trsth = 0x1F4, - .togcnt100n = 0x35, - .trefi = 0x4E, - .tmrd = 0x4, - .trfc = 0xBB, - .trp = 0x8, - .trtw = 0x4, - .tal = 0x0, - .tcl = 0x8, - .tcwl = 0x6, - .tras = 0x14, - .trc = 0x1D, - .trcd = 0x8, - .trrd = 0x6, - .trtp = 0x4, - .twr = 0x8, - .twtr = 0x4, - .texsr = 0x200, - .txp = 0x4, - .txpdll = 0xD, - .tzqcs = 0x40, - .tzqcsi = 0x0, - .tdqs = 0x1, - .tcksre = 0x6, - .tcksrx = 0x6, - .tcke = 0x4, - .tmod = 0xC, - .trstl = 0x36, - .tzqcl = 0x100, - .tmrr = 0x0, - .tckesr = 0x5, - .tdpd = 0x0 - }, - { - .dtpr0 = 0x3AD48890, - .dtpr1 = 0xBB08D8, - .dtpr2 = 0x1002B600, - .mr[0] = 0x840, - .mr[1] = 0x40, - .mr[2] = 0x8, - .mr[3] = 0x0 - }, - .noc_timing = 0x2891E41D, - .noc_activate = 0x5B6, - .ddrconfig = 3, - .ddr_freq = 533*MHz, - .dramtype = DDR3, - .num_channels = 2, - .stride = 9, - .odt = 1 -}, diff --git a/src/mainboard/google/veyron_speedy/sdram_inf/sdram-ddr3-hynix-2GB.inc b/src/mainboard/google/veyron_speedy/sdram_inf/sdram-ddr3-hynix-2GB.inc deleted file mode 100644 index 07161c0dfa..0000000000 --- a/src/mainboard/google/veyron_speedy/sdram_inf/sdram-ddr3-hynix-2GB.inc +++ /dev/null @@ -1,77 +0,0 @@ -{ - { - { - .rank = 0x1, - .col = 0xA, - .bk = 0x3, - .bw = 0x2, - .dbw = 0x1, - .row_3_4 = 0x0, - .cs0_row = 0xF, - .cs1_row = 0xF - }, - { - .rank = 0x1, - .col = 0xA, - .bk = 0x3, - .bw = 0x2, - .dbw = 0x1, - .row_3_4 = 0x0, - .cs0_row = 0xF, - .cs1_row = 0xF - } - }, - { - .togcnt1u = 0x215, - .tinit = 0xC8, - .trsth = 0x1F4, - .togcnt100n = 0x35, - .trefi = 0x4E, - .tmrd = 0x4, - .trfc = 0xBB, - .trp = 0x8, - .trtw = 0x4, - .tal = 0x0, - .tcl = 0x8, - .tcwl = 0x6, - .tras = 0x14, - .trc = 0x1D, - .trcd = 0x8, - .trrd = 0x6, - .trtp = 0x4, - .twr = 0x8, - .twtr = 0x4, - .texsr = 0x200, - .txp = 0x4, - .txpdll = 0xD, - .tzqcs = 0x40, - .tzqcsi = 0x0, - .tdqs = 0x1, - .tcksre = 0x6, - .tcksrx = 0x6, - .tcke = 0x4, - .tmod = 0xC, - .trstl = 0x36, - .tzqcl = 0x100, - .tmrr = 0x0, - .tckesr = 0x5, - .tdpd = 0x0 - }, - { - .dtpr0 = 0x3AD48890, - .dtpr1 = 0xBB08D8, - .dtpr2 = 0x1002B600, - .mr[0] = 0x840, - .mr[1] = 0x40, - .mr[2] = 0x8, - .mr[3] = 0x0 - }, - .noc_timing = 0x2891E41D, - .noc_activate = 0x5B6, - .ddrconfig = 3, - .ddr_freq = 533*MHz, - .dramtype = DDR3, - .num_channels = 2, - .stride = 9, - .odt = 1 -}, |